The vast arrays of computers around the world consume huge amounts of power. The Data centers that enable the internet exemplify this power usage. As much as 1.2% of the power consumed in the entire U.S. alone is consumed by servers. Worldwide in 2005 more than $7 B dollars was spent on powering servers and the infrastructure supporting them - requiring the equivalent capacity of fourteen 1,000 MW power generating facilities.

Compounding the energy use problem is the waste associated with power conversion and conditioning, distribution, and environmental control including air conditioning. In a typical data center less than half of the power consumption goes into the computing function. Data center operators are looking at every opportunity to increase power conversion and distribution efficiency including eliminating the number of conversion stages through the distribution of high voltage direct-current sources.

In the U.S. the electric grid distributes AC power to local communities at around 13,800 vac. That is eventually stepped-down to 480 vac using transformers that do not contribute significantly to energy loss. The data centers almost always have an Uninterruptible Power Supply, commonly a double-conversion on-line UPS that continuously generates a new clean sine wave output from the rectified AC mains or a battery, so there is no switch over interruption. This stage of the power conditioning may be only 70% efficient.

At the server rack the 208 vac power is converted to 12 or 48 vdc and stepped down to the bus voltages required for the processor, disk drives, and memory. Both the double-conversion UPS and switched-mode AC/DC converter benefit from high performance semiconductor components like, IGBTs, and super-junction power MOSFETs for rectification, battery charging, and DC/AC inverting.

Power Conversion Stages in a typical data center Click on image to enlarge.

A fully populated server rack with two processors per board could use 5 kW and waste as much as 500 W with 90% converter efficiency. High performance low voltage MOSFETs have enabled improved efficiency for these conversion stages with both lower on-state resistance and lower switching loss. In the last decade VR efficiency has increased by more than 5% and increased the output current rating by five times.

Buck converters of past generations may have used a Schottky diode and 60V rated power MOSFET achieving 80-85% efficiency. Even though processor input voltage decreased, present power MOSFET products can achieve greater than 90% efficiency.

Advanced LV power MOSFETs cut losses

Till the mid 1990s the focus of development in low voltage power MOSFETs was the R_DS(ON) as conduction losses (I2R) were the dominant components of the total power loss. As switching frequencies started to go up, researchers started to look at gate capacitance and gate charge more closely. The figure below shows trends in the Figure-of-Merit for power MOSFETs " normalized RSP and combined R_SPQ_GD. There has been close to a 10X reduction in these features over the last 14 years.

Figure-of-merit trends for a 30V power MOSFET over time Click on image to enlarge.

Several new technologies have been developed to reduce both on-resistance and gate charge. First of these included the incorporation of a thicker oxide at the bottom of the gate trench (figure below). This not only helps in reducing the gate to drain capacitance, but also improves drift region resistance. It also helps to decouple the on-resistance and gate charge because now one can keep a thin gate oxide to get lower Vth and hence lower on-resistance, but at the same time, have a thicker trench bottom oxide to give the lowest C_GD.

Device cross-section of a power MOSFET with thick bottom oxide Click on image to enlarge.

Another concept that was originally developed for high voltage devices, but now being used for low voltage devices as well, is the use of charge balance or Super-Junction device structures. With the use of charge balance approach, one can obtain two-dimensional charge coupling in the drift region. This enables the use of higher doping in the drift region which results in reduced drift resistance. At Fairchild, this concept has been implemented using a fourth electrode, shield, and a thick oxide, as shown in the figure below.

Device cross-section of a power MOSFET with shield electrode Click on image to enlarge.

Other parameters are now becoming more relevant like the body diode reverse recovery, internal gate resistance, and the output charge of the MOSFET (Q_OSS). Low voltage MOSFET products are now being optimized to minimize the diode reverse recovery as well as the output capacitance. The importance of these loss components rises at higher switching frequencies and higher output currents.

The package resistance, inductance and its thermal properties also play a key role in determining the power loss, especially as the devices are becoming smaller in size and co-packaged solutions gain a foot-hold in the application.

In a DC-DC converter application, on-resistance controls the high load efficiency do to conduction losses while the gate charge, reverse recovery charge and output capacitance control the light load efficiency. The chart below shows the relative power loss of various components at different output loads.

Relative contribution from various power loss components in a DC-DC converter Click on image to enlarge.

The pace of development of power conversion silicon solutions may have accelerated in recent years. Efficiency gains, particularly at light load conditions, are expected to advance significantly for devices targeted for introduction in 2010 (the figure below).

Efficiency comparison between two generations of power MOSFET technology Click on image to enlarge.

Advanced high voltage devices cut power loss in the AC/DC stage

Switch-mode power supplies with PFC are used in the first power conversion stage in the data centers, and now in telecom power supplies and white goods. Historically, power factor correction circuits have used a boost converter topology that combined a power switch (MOSFET or IGBT) and boost diode. However, with the introduction of the soft recovery diode like Fairchild Semiconductor's Hyperfast Stealth, snubber circuitry may be eliminated or reduced, and the boost converter can be implemented in the hard-switched mode. When the Stealth diode or SiC Schottky diode is combined with new Super-Junction technology like SupreMOS, designers can obtain lower conduction and switching losses, simplified gate drive, and reduced EMI.

Utilizing PFC not only ensures compliance with regulatory specifications such as EN61000-3-2 for reduced harmonic content and improves reliability due to less stress on components; it also improves conversion efficiency by increasing the maximum power that can be drawn from the source.

Most high power active PFC designs for an AC/DC stage incorporate a continuous current mode (CCM) boost converter topology because of its simplicity and wide AC input voltage range. Another PFC operating mode, boundary conduction mode (BCM), is used at low power levels. The CCM boost converter, shown in Figure 1, operates the boost diode and switching device in the hard-switched mode. The drawback to hard switching is that the diode reverse recovery characteristics increase the switching device's turn-on losses and the generated EMI.

The diode's reverse recovery characteristics determine how it transitions from the forward conducting state to the reverse voltage blocking state. If the return of the reverse recovery current from IRRM to zero is too abrupt, voltage spikes and severe EMI are generated. To soften this response, circuit designers have either slowed down the switch turn on di/dt and/or added snubber circuits. With prior diode technology, the designer was limited to having either a soft or fast diode. The large IRRM value of previous soft diode technology generated high turn-on loss during the diode t_rr period. At the same time, slowing down the switch turn-on rate increases the switch turn-on loss. Adding snubber circuitry adds cost and complexity and reduces reliability. Besides, the snubber circuits often involve complex energy recovery schemes, since the basic RC approach results in high power dissipation in the snubber resistor. To overcome this problem, a Stealth II diode can be used to also reduce turn-on loss. MOSFET Super--Junction technology can have extremely low R_DS(ON) to reduce conduction loss and the Super-Junction device can be extremely fast, cutting turn-off loss. New technologies like SupreMOS and Stealth-II diode enable the highest efficiency for soft switched PFCs.