Design Article
Need to estimate buck converter efficiency in portable apps?
Jingdong Chen, National Semiconductor
1/14/2008 12:31 PM EST
In this article, characteristics of PFM operation are examined. System efficiency is then calculated accordingly. Predicted efficiency within the whole operating range is then compared to test results.
Efficiency analysis of buck converter
PWM mode
Duty cycle calculation at PWM mode
Refer to Figure 2-1 for circuit schematic.




When top PFET is on, using KVL, the following equation is obtained:

Equation (2-1) can be simplified as:

When PFET is off and the NFET is on, using KVL, the following equation is obtained:

Equation (2-3) can be simplified as:

Equation (2-2) minus equation (2-4), we have:

Efficiency estimation:
Definition of several terms:

Efficiency estimation under PFM mode
Burst and Pulse frequencies
Typical inductor current and output voltage waveforms are shown in Figure 2-4.

During PFM, a nonlinear bang-bang control is applied. There are three boundary conditions to regulate output voltage: peal inductor current, Vout upper threshold, Vout lower threshold.

When PFET turns on, the inductor current would increase until it reaches current limit. Note: this current limit is set specifically for PFM, not the over current limit for circuit protections.

When PFET turns off, NFET turns on, the inductor current would decrease until it reaches zero. The following equation is satisfied:

On the other hand, when Vout reaches its upper threshold, the converter shuts off. Only Cout supports the load current until Vout decreases to lower threshold.




