The increase in worldwide energy prices together with the rise in operating expenses associated with electronic goods are becoming a larger portion of equipment and/or consumer goods purchasing decisions. Therefore, R&D engineers are continuously looking for ways to reduce the power consumption of their products. In the past, this was mainly true for battery-powered applications since efficiency heavily influences the operational run time of a device. However, this trend has expanded over recent years to include many off-line powered consumer goods. 'Green' has changed from a 'buzz word' to a market trend that needs to be addressed by today's power solutions. Most look for architectural changes or lower power technologies to incrementally improve the efficiency of their systems while maintaining or improving performance levels. In this article we will examine a DC/DC controller in conjunction with the latest generation of NexFET power MOSFETs to address the higher efficiency aspect with additional functionality to increase the overall performance.

There are many non-isolated DC/DC controllers on the market that can convert from a 3.3 V, 5 V or 12 V power rail down to a processor core voltage. Existing solutions that have worked well in the past may not meet the requirements of today's high-performance processors. With further integration and increased performance, processor core voltages are beginning to drop sub 1 V while their current consumption increases up to multiple amps. These advancements of process technology must be matched with readily available point-of-load solutions. We will address these challenges in greater detail in order to show the advantages of the latest controller and MOSFET technologies. These advanced products are able to support ceramic bulk, bypass and filtering capacitors, in rush currents, active EMI reduction to pass FCC approval specifications, tight voltage regulation accuracy and, and last but not least, the support of pre-charged capacitor banks during start-up. All while achieving high efficiency, a small form factor and increased reliability.

Next generation controller technology

DC/DC controllers such as the TPS4030x family have been optimized to improve efficiency and contain the advanced features required by today's multi-rail processors. The TPS4030x family has strong drivers that quickly switch the external MOSFETs and reduce the dead time to achieve high efficiency across the full load range. The boot strap circuit with an integrated diode also allows the use of a low R_DS(ON) N-channel MOSFET as the high side switch. The TPS4030x family of synchronous buck controllers (see Figure 1) operates from 3 to 20 V input supporting intermediate bus voltages of 3.3 V, 5 V and 12 V. These controllers implement voltage-mode control architecture. The frequency spread spectrum (FSS) feature adds dither to the switching frequency, significantly reducing the peak EMI noise and making it much easier to comply with EMI standards.

The controllers offer design flexibility with a variety of user programmable functions, including soft-start (capacitor connected EN/SS pin), over-current protection (OCP) levels (resistor connected to LDRV/OC pin), and loop compensation. During normal operation, the resistor programmed OCP voltage level is compared to the voltage drop across the conducting low side MOSFET to determine whether an over current condition exists. The controller enters a re-start hiccup mode until the fault is removed.

Figure 1: TPS4030x Embedded Feature Overview

EMI design challenges

A potential negative to all the benefits of switch-mode power supply (SMPS) power conversion is noise generated from the high dv/dt and di/dt of the power pulses. When traditional techniques for mitigating EMI generation fail to provide the necessary noise margin, the application of frequency spread spectrum (FSS) may achieve the required energy reduction. For example, when using the TPS40303x family, the FSS feature can be enabled by connecting a resistor with a value of 267 kΩ ±10 percent from BP to EN/SS pin. When enabled, it spreads the internal oscillator frequency over a minimum 12 percent window using a 25 kHz modulation frequency with triangular profile. By modulating the switching frequency, side-bands are created. The emission power of the fundamental switching frequency and its harmonics is distributed into smaller pieces scattered around many side-band frequencies. The effect significantly reduces the peak EMI noise and makes it much easier for the resultant emission spectrum to pass EMI regulations. By enabling this feature, EMI energy can be reduced by up to 10 dB at the higher frequencies (see Figure 2).

Figure 2: ∼10dB peak EMI reduction due to Frequency Spread Spectrum (fsm= 600 kHz; fm= 25 kHz)

Sequencing and pre-bias startup

The majority of processor manufacturers provide timing guidelines for core and I/O power-up sequencing. Once a system's timing requirements are understood, an appropriate technique can be chosen. There are several distinct methods to power up and down a multi-rail-power supply; sequential, ratiometric or simultaneous sequencing. Also, many applications require support of pre-biased start-up.

Sequencing can be implemented when there is a short time interval required between the core voltage and I/O voltage to power-up. This can be in any order. The easiest way to do this with the TPS4030x is to simply connect the PGOOD pin of one controller to the EN/SS pin of the other controller.

To implement ratiometric sequencing, one can simply tie the EN/SS pins of two or more converters together. This simple technique allows charging via multiple current sources into one common soft start capacitor. This way all controllers use the same ramp and reach regulation at the same time.

In a system requiring pre-bias, the I/O voltage may be applied before the core voltage is turned on, and a minimum delta must exist between the core and I/O voltage. Figure 3 shows an example of a pre-biasing start-up waveform. In this scenario, the processor's manufacturer recommends diodes to pre-bias the core voltage before it is powered-up. This maintains a minimum delta between the core and I/O voltages.

When using a synchronous buck dc/dc converter, make sure that the low side MOSFET is kept off during start-up, or the bias voltage already applied to the core will sink to ground as the dc/dc converter starts up. This can potentially damage the external bypass diodes. When the core's converter is turned on, the core voltage should be ramped-up from the biased voltage to the desired voltage level. Figure 3 also illustrates an example of a pre-biasing start-up waveform.

The same scenario can, of course, take place when capacitor banks remain pre-charged during a short source supply fault. In multi-rail systems, this can cause severe damage to the ESD structure of multi-rail processors. So the recommended practice is to use controllers that support pre-bias where the synchronous MOSFET will be disabled during startup, relying on the body diode of the FET to maintain current flow if the circuit demands it.

Figure 3: Pre-Bias Startup scenario, showing two power stages and the disabled Sync. FET with arrows for the current flow

NexFET power MOSFET achieves new levels of performance

In the 1980s, planar technology was the dominate structure used by MOSFET manufacturers (see Figure 4). By the late 1990s, most manufacturers transitioned to the trench structure because of its inherent advantages in specific on resistance. The common thinking was that the low R_DS(ON) allowed designers to achieve high current density in their point-of-load (POL) applications. The negative of the trench structure, however, is the high capacitances that are developed between the gate and the drain (miller capacitance) and the gate and the source. These large capacitances mean that a great deal of charge is needed to switch the device. This creates large losses within the controller's driver circuit and the MOSFET device during switching. Therefore, designers were reluctant to increase switching frequency and sacrifice their design's efficiency.

In 2007, the NexFET power MOSFET was commercially introduced. The NexFET structure is able to achieve similar specific on resistance when compared to the TrenchNET structure but significantly reduced the associated capacitances. This results in figures of merits (FOM) of about 50 percent of the existing technology in both R_DS(ON) x Q_g and R_DS(ON) x Q_gd. The improved FOMs allow NexFET technology to achieve higher efficiency at a given frequency. The technology also flattens the power loss curve to enable higher switching frequencies and improvements in power density.

Figure 4:MOSFET Evolution showing 80's Planar, 90's Trench and 2007 NexFET - highlighting lower CGS and lower CGD area

Compelling Results

The combination of the latest dc/dc controllers with the NexFET power MOSFETs can achieve world class performance (see Figure 5), while providing the advanced features required by multi-rail processors. This circuit has over 90 percent efficiency at 20 amps with an output switching frequency of 600 kHz. The efficiency is flat across the complete load line because of the low switching losses provided by the controller and the NexFETs. High performance is maintained even while increasing the input voltage from a 3.3 V to a 12 V rail. Normally at 12 V, the light load efficiency is much lower below five amps. NexFET technology reduces switching losses and associated penalties of switching the higher voltage.

Figure 5: TPS40304 Efficiency Graph at 600 kHz with NexFETs at input voltages of 3.3 V, 5 V and 12 V to 1.2 V @ 20 A featuring CSD16323Q3 and CSD16321Q5

Literature:

Data Sheet of TPS40303/4/5 - Lit.-No.: SLUS964 SEM1600 Topic 2: Sequencing Power Supplies in Multiple Voltage Rail Environments

SEM1800 Topic 2: Understanding Noise-Spreading Techniques and their Effects in Switch-Mode Power Applications

About the authors:

Jeffrey Duane Sherman is Product Marketing Engineer for Texas Instruments' Power Stage Business Unit where he is responsible for promoting and marketing all power stage products including NexFET power MOSFETs. Sherman has over 20 years of power management experience and has written numerous articles on a variety of power topics and holds two patents. He received his BSEE and studied for his MBA at the University of Michigan in Ann Arbor, Michigan, his MSEE is from the Northeastern University in Boston, Massachusetts.

Dipl. Ing. (FH) Dirk Gehrke is Business Development and Marketing Manager for Power Solutions since 2006, taking care of customers in Europe. Gehrke joined Texas Instruments in 1998 and worked as Field Application Engineer (FAE) in UK, France and in US. In 1999 he moved to Freising, Germany, where he has specialized in power management products. While at TI, he has helped define several new technologies, published numerous articles, was awarded a patent with three more applications, and has participated in the development of a digital graphic user interface for power control. Gehrke graduated from the FH Dortmund with a diploma in communications engineering.