Broadcast video products continue to push the boundaries of performance, many beyond the published industry standards. There are a broad range of components required to design a product that meets the numerous industry requirements like jitter, eye timing and signal rise/fall, to mention a few. Each component in the video signal path can have an impact on the product’s performance. The analog and mixed-signal serial digital interface (SDI) components–such as cable equalizers, cable drivers, reclockers, serializers and deserializers (Ser/Des)–form a critical portion of the video signal path.
They have power requirements, specifically for VCC voltage ripple, that are often understated or misunderstood with regards to their impact on SDI video quality. Focus on this design parameter can make the difference between a product whose performance is acceptable and exceptional. This article will discuss the issues and related trade-offs that VCC ripple has on the performance of these video components.
Figure 1. Sample SDI Block Diagram
The VCC ripple specification for SDI components like those shown in Figure 1 is typically not found in the device’s product datasheet because the ripple limitations depend on a particular product’s specific performance needs.
For example, what video data rates will be supported? What cable length (cable reach) is required at the product input? Meeting the product design specification requires managing the imposed jitter at each stage of the SDI signal path.
The VCC ripple on an SDI component can have a direct impact on the jitter and therefore, the resulting product performance. Designers of SDI components make every attempt to make their devices tolerant to power supply ripple and noise. However, understanding the VCC ripple requirements for these devices and the associated performance trade-offs is still an important consideration. This is especially true for 3G data rates and newer components which enable long cable reaches.
The cable equalizer (EQ) is the receive component in the SDI signal path and provides both amplification for and restoration of the incoming video signal. A 3G video signal can be attenuated by as much as 50dB on a 180m length of cable (Belden 1694A). That means a signal with 800mV of amplitude, at the cable driver, would be reduced to about 3mV after 180m of cable at the input of the EQ. The signal to noise ratio (SNR) plays a key role in powering a 3G EQ like the LMH0394 and LMH0395 (dual output), which can restore a signal after 180-200m of cable loss.
The graph in Figure 2 shows the maximum power supply ripple on VCC based on the data rate of the video signal and the desired video cable reach. The vertical axis is plotted on a log scale, making it easier to resolve the allowable ripple voltage for a longer cable reach.
In order to achieve maximum cable reach, the ripple voltage limits for standard-definition (SD) and high-definition (HD) data rates are about 58mV and 22mV respectively, while for 3G at 190m is about 9mV. The ripple amplitude should be ≤100mV regardless of the SDI data rate or cable reach, in order to ensure the full functionality of the equalizer.
Figure 2. VCC Ripple Requirements for SDI Equalizers
Reclocker and Ser/Des
SDI Devices like reclockers and Ser/Des have integrated phase lock loops (PLLs) which drive an obvious need for clean power. The video data rate determines the PLL loop bandwidth and therefore, the power supply rejection ratio (PSRR) which rolls off with frequency.
As shown in Figure 3, the video data rate and also the switching frequency (Fsw) of the power supply have an impact on the maximum VCC ripple. Designing the power supply for a lower Fsw will allow more ripple on the VCC of the device; it will also result in a higher efficiency power solution.
Figure 3. VCC Ripple Requirements for SDI Reclockers and Ser/Des
SDI cable drivers like National’s LMH0302 and LMH0307 (dual output) have their outputs terminated directly to VCC, as shown in Figure 4. Given that, any power-supply noise or ripple on VCC is transmitted directly on the outgoing video signal and will show up at the input of the receiving product as additive jitter.
Like the cable EQ, the cable driver’s VCC ripple limitation is data rate dependent. Slower data rates have a larger unit interval (UI) from a time based perspective, therefore, with a larger UI, more allowable jitter and correspondingly more VCC ripple are acceptable.
The graph in Figure 5 shows the maximum ripple voltage based on a given video-data rate and the cable driver’s corresponding contribution to the total output jitter. As with other devices in the SDI signal path, the VCC ripple, or lack thereof, is a contributor to the SNR and resulting jitter on the video signal.
In summary, the VCC ripple at the cable driver will directly contribute to the video signal’s additive SNR resulting in more jitter at the EQ of the receiving product.
Figure 4. LMH0302 Cable Driver
Figure 5. Allowable VCC Ripple for a SDI Cable Driver
In conclusion, focusing on the VCC ripple level of a power design for SDI components can make the difference between a product whose performance is acceptable and one that’s excellent. Conversely, if a product’s jitter level or cable reach is less than optimal it may be worth examining the VCC ripple on individual SDI components to see what improvements are possible. Designing switch mode power supplies (SMPS) with voltage ripple and noise that is <10mV takes some level of care. In most cases, the ripple on the output of a voltage regulator will exceed 10mV.
Power modules like National’s award-winning Simple Switcher power modules are an exception. Modules like the LMZ10503/4/5 (3A, 4A and 5A) and LMZ2206/8/10 (6A, 8A and 10A) are fully integrated, highly efficient buck regulators that boast low output ripple, excellent thermal performance and are compliant with EN55022 (CISPR 22) for electromagnetic interference (EMI). Linear drop-out regulators (LDO) can clean-up a voltage rail, but selecting the correct part is very important. The PSRR of LDOs decreases with frequency and is often insufficient to clean up the ripple of a SMPS operating at Fsw >100KHz.
LDOs such as National’s LP5900 and LP3878 do an excellent job of attenuating power-supply ripple and noise from switch mode supplies with Fsw >100KHz. Filtering power rails for sensitive designs like these is also an option worth consideration. Implementing post SMPS filters for VCC ripple <10mV is not a trivial task and will involve care in both part selection and design.
About the Author
Don Rhodes is a field applications engineer with National Semiconductor Corp., and is based in Tigard, Oregon. He received his BSE degree from Chapman University.
Editor's note: If you liked this article and are interested in "power" issues such as efficiency; thermal concerns; AC/DC and DC/DC supply topologies; batteries; supply ICs; complete supplies; single- and mult-rail management; and supply monitoring: then go to the Power Management Designline home page here for the latest in design, technology, trends, products, and news. Also, sign up for our weekly Power Management Designline Newsletter here. You won’t be disappointed, and we won’t waste your time, that's a promise!