System-on-chip technology comes of age

Convergence

The present decade represents a period of strategic inflection in the evolution of the semiconductor industry – the next five years are likely to see a confluence of several technology and market forces which will collectively have a profound impact on the course of the industry. These trajectories are discussed below.

Trajectory #1: Ascendance of the SoC Functional integration is expected to continue making the SoC far more sophisticated and powerful. It will also evolve to consume less power and shrink in size as it moves from 40nm lithography to advanced geometries. Qualcomm, NVIDIA and Apple have demonstrated solid performance gains over successive iterations of their flagship SoCs (Snapdragon, Tegra and AX). There is likely to be fierce competition among these players as each tries to incorporate more functionality into their chips and win designs for new mobile products. The ascendance of the SoC will force disruptive changes to the traditional IDM cost structure and business model.

Trajectory #2: Ascendance of the GPU Usage models of the tablet and the smartphone indicate that the GPU is the most heavily used block within SoCs like the Tegra, Snapdragon and the A5X. Since the GPU is the largest block and also consumes most of the power on the chip, it is instructive that the silicon transistor be designed to optimize the performance and power of the GPU. It is likely that design houses and foundries will make the GPU the centerpiece for transistor design and manufacturing – historically all the blocks including the GPU had to adapt a transistor that had primarily been designed for the CPU. The rapid evolution of the SoC and the increasing role of the GPU are evident in Figure 2 which shows three successive generations of Apple A- family processors which were released within a two year period. The GPU on the latest A5X processor occupies almost half the die area.




Click on image to enlarge.


Trajectory #3: Diminishing returns from transistor scaling As the law of diminishing returns eventually catches up with Moore’s Law, there will be little economic incentive to scale transistor feature size. Companies at the leading edge of Moore’s Law may be able to compete effectively in high margin segments (servers and data centers) but will find it difficult to price their parts competitively for the low margin consumer markets. Design houses may find it more economical to scale orthogonally instead (e.g. adding more functionality and lower power per layer with 2.5D and 3D integration).

Trajectory #4: Accelerating product life-cycles Tablet and smartphone offerings are refreshed once every year – much faster than the historical PC refresh cycle. The semiconductor industry will need to adjust its technology development lifecycle to keep pace with the mobile product lifecycle. It is not feasible to scale-down transistor geometry every year – however it is quite feasible to rapidly incorporate increasing levels of functional integration into an existing geometry.

Trajectory #5: Dropping ASPs of mobile consumer products Already one is seeing the beginnings of a price war within the mobile space as companies like Google and Samsung offer tablets at half the price of the iPad. But as fabless vendors start competing from below for the high-end laptop and ultrabook markets, they will put significant pricing pressure on incumbents like Intel to price their parts competitively.

Trajectory #6: Growth in mobile SoC shipments Gartner predicts that total smartphone and tablet volumes may exceed 500 million units by 2015. At this rate, mobile SoC shipments will dwarf CPU shipments within the next few years.

The confluence of all of these vectors over the next 5 years is likely to put SoC technology at the heart of the semiconductor industry. Chip companies like Apple, Qualcomm, NVIDIA and Samsung are well positioned for this scenario and are likely to keep enhancing the functionality of their respective offerings. Design IP providers like ARM and Imagination Technologies are poised to benefit immensely as well. Foundries are well positioned to capitalize on this trend and will benefit from refocusing their efforts on transistor design in a way that is GPU-centric rather than being CPU-centric. Intel will continue to face increasing pressures to compete in the mobile market and Intel’s product mix may reflect a move toward more on-chip functional integration in the years to come. More importantly, Intel will be forced to also compete with SoC technology in the ultrabook and PC segments and doing so may necessitate a change not only in its technology direction but also in its business model.

If these trends continue, there is no reason why a SoC chip cannot displace a standalone CPU chip in a high-end laptop. The boundaries between the standalone CPU and the SoC are thus likely to erode in the years to come as the industry embraces and unleashes the full disruptive potential of the SoC.

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References
(1) Andrew S. Grove, Academy of Management, Annual Meeting, Aug 9 1998, http://www.intel.com/pressroom/archive/speeches/ag080998.htm




Pushkar Ranade is director of process integration at SuVolta. Prior to joining SuVolta in 2010, Ranade was with Intel Corp. where he contributed to transistor process integration and development of Intel’s 65-, 45- and 22-nm logic technology. Ranade joined Intel in 2003 after graduating with a Ph.D. from the University of California, Berkeley. At Berkeley, his research was in the area of sub-70nm CMOS transistor design and involved the integration of novel gate materials and ultra-shallow junctions. Ranade has authored or co-authored over 40 technical publications and holds 9 U.S. patents.