Intel's new CEO shakes things up
post comment
30 comments
World's first field-programmable radio frequency (FPRF) chip
Imperas launches multicore software development tools
All eyes on Zynq SoC for smarter vision
post comment
1 comment
Artificial heart ready for human trial
post comment
1 comment
Altera to buy Enpirion for on-chip power conversion
post comment
2 comments
Moving to SystemC TLM for design and verification of digital hardware
Multicore debug goes heterogeneous at PMC-Sierra
post comment
1 comment
Channel compensation methods used in JESD204B converters
From AVR to ARM with Alf-Egil Bogen and Energy Micro
Electronics in medicine: Insulin pump design
post comment
7 comments
The Programmable Logic Designline is edited by Clive (Max) Maxfield. Here in programmable logic space (where no one can hear you scream) we are interested in anything and everything to do with programmable logic, including FPGAs, CPLDs, CSSPs, PSoCs... along with their associated design and verification tools and flows... Please contact