Programmable Logic Design Features

Book excerpt – The art of hardware architecture, part 4

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Comparing FMCs with PMCs/XMCs for harsh environments (Part 2)

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Comparing FMCs with PMCs/XMCs for harsh environments (Part 1)

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Design industrial systems on a chip that meet stringent global safety standards

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Book excerpt – The art of hardware architecture, part 3

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Book excerpt – The art of hardware architecture, part 2

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Hands on RF: Handle multiple waveforms in a software-defined radio platform

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How formal MDV can eliminate IP integration uncertainty

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FireWire at 4Gbps—Impact on industrial apps

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Top 10 automotive electronics stories of 2011

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Technical Papers

Xilinx Stacked Silicon

Reducing Steps to Achieve Safety Certification

Reducing Cost and Power in Consumer Applications Using PLDs

Lowering Power at 28 nm with Xilinx 7 Series FPGAs

Offline LED Lighting Simplified: High Power Factor, Isolated LED Driver Needs No Opto-Isolators and is TRIAC Dimmer Compatible

Implementing Next-Generation Passive Optical Network Designs with FPGAs

Putting FPGAs to Work in Software Radio Systems, 6th Edition

Implementing Lowest Power Digital Datapaths in Days, not Weeks

Courses and Webinars

Accelerate Industrial Applications Using Xilinx® Spartan™-6 FPGAs and National Instruments® Tools

Divide and Conquer: Faster FPGA Delivery using Hierarchical, Parallel Design Development

Meeting Aggressive Power Budgets with Xilinx 7 Series FPGAs

Video over LTE—Testing the next step in the end user experience

Keep Connected Cars Up to Date with FOTA (Firmware Over-the-Air) Technology

Designing Cost-effective, Greener LTE Basestations with Xilinx FPGAs

Easily Create PCIe-based Designs for FPGAs

Conquer FPGA Design Complexity with System-Level Integration

Teardowns

Video: Tear down that Prius!

Wide Bluetooth, Wi-Fi adoption seen in handsets

Inside the Samsung Galaxy Tab: Taking on the iPad

Inside Xbox 360's Kinect controller

N8: Solid start for Nokia’s Symbian^3 strategy

CE parts met cockpit avionics in vintage F-15 video camera

Innovation at home: Inside a 3-D desktop scanner

FitBit blends wireless, MCUs and MEMS with online interface

BenQ K60 e-reader: Trying to stand on the shoulders of giants

First look inside iPhone 4 reveals high reuse

More Design Teardowns >

Reference Designs

Quantenna debuts 802.11n 4x4 MIMO wireless video bridge ref design

Quantenna Communications Inc. has debuted a complete reference design based on its QHS600 IEEE 802.11n wireless LAN (WLAN) 4x4 multiple input, multiple output (MIMO) chipset.
Learn more >

Lattice adds over 90 reference designs for PLDs

Lattice Semiconductor Corp. has released more than 90 reference designs optimized for the MachXO and ispMACH 4000ZE PLDs.
Learn more >

More Reference Designs >

Products

Samplify Systems announces APAX application acceleration technology

Multi-output regulators take up less space on the board

Xilinx announces ISE Design Suite 13.4

New USB-to-SPI protocol converter from Microchip

Real Intent upgrades Clock Domain Crossing product

Crimp terminals achieve the greatest durability, current per circuit

HTML5 platform for infotainment systems debuts at CES

Dual-image sensor stereo camera FPGA-based reference design from Lattice and Aptina

Microsemi and INVIA deliver DPA-resistant cryptographic software on SmartFusion FPGAs

Mentor, Mecel roll AUTOSAR 4.x basic software package

Commentary

That Was Tricky! Where were our wireless packets?

Clive Maxfield

Why did the wireless network shut down when the production line started up?

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What were they thinking: Google is at it again

Brian Bailey

Are you worried about how much data the government has about you, well don’t worry, because Google has SO much more…

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Stand Back! I have a robotic ball (and I’m not afraid to use it)!

Clive Maxfield

Do you recall my recent column “I want robotic balls”? Well, I now have one of my very own (“…my precious, my precious…”)

Join  post comment   5 comments    last comment  Max the Magnificent
Someone coming into this conversation late might wonder just what it is we are all talking about :-)

Xilinx unveils latest and greatest 28nm 7 Series FPGAs at DesignCon 2012

Clive Maxfield

In addition to demoing their latest FPGAs, the folks from Xilinx will also be discussing stacked silicon interconnect technologies…

Join  post comment   1 comment    last comment  Max the Magnificent
I really think that once embedded designers have started to play with them, new devices like the ...

DIY days: better, worse, or just very different?

Bill Schweber

How does today's do-it-yourself experimenter situation compare to "back in the day"?

Join  post comment   16 comments    last comment  David Ashton
@ "...have you unsoldered a 16pin IC without a fairly specialized setup recently?" A hot air gun is ...

DesignCon 2012 Panel: Test gurus share vision to accelerate your ‘time to answer’

Patrick Mannion

The countdown begins: On Wednesday next at DesignCon 2012 http://www.designcon.com I’ll be moderating a panel comprising four of the sharpest minds in the electronics industry as they explore the cutting edge of technology and what it means for you, the test engineer.

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How It Was: PDP and VAX computers

Clive Maxfield

...we had a couple of PDP11/70’s ( I remember being told they cost $120,000 each), a PDP11/44, and a VAX 730...

Join  post comment   11 comments    last comment  EREBUS
I started with a then new PDP 11/20 with 16K words of magnetic core memory and a super 64K word hard ...

OMG! I opened the box and…

Clive Maxfield

I am well and truly flabbergasted. I think it’s safe to say that my ‘flabber’ has never been quite so ‘gasted’. I’m also speechless, and that doesn’t happen very often…

Join  post comment   2 comments    last comment  Max the Magnificent
I suppose it would be very naughty of me to mention that I really like their classic leather ...

Predictions: The bold prediction for EDA

Brian Bailey

So, my run of predictions for 2012 is over except for one. This one predicts what the EDA industry will look like, and it sure IS pretty…

Join  post comment   1 comment    last comment  Sharath666
There was an opinion that TSMC would buy Cadence in 2005. Here's the link ...

Opinion: Bug Love

Lewis Sternberg

I love to see the look on fellow DV engineer's faces when I tell them "bugs screw up my productivity"...

Join  post comment   2 comments    last comment  Lewis.Sternberg
Yes, I basically enjoy my job :-) As far as I can tell, designers and DV engineers are about equally ...

Recent Comments

VNP  01.28.2012
Speaking up for M2M radio innovation
"Something more is needed" seems to be a key-phrase. And nothing about coverage, security and so on. ...
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Made in USA  01.28.2012
Time to play hard ball on tech manufacturing
Dishonest fiat monetary/banking system is root cause of 30-plus year manufacturing loss. Vote Ron ...
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hm  01.28.2012
Vishay ChipLEDs are super thin and ultra bright
Do they have it with diffrent option for optical lenses? This may widen applications for this ...
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Most Commented

Time to play hard ball on tech manufacturing

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January 2012 caption contest: Tee time

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Have you seen any erlangs lately?

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Introducing Opal Kelly’s new entry-Level Xilinx Spartan-6 USB FPGA module – the XEM6001

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Book excerpt – The art of hardware architecture, part 1

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Reader Message Boards

Job offer as Senior FPGA Engineer

By jaranguren on 09.29.2010

Hello, everyone.

Through a personal contact I came across a job offer posting from Accelogic, a Ft. Lauderdale based high technolgy company, on

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last comment   12.31.2010  yalanand
I think we should have regular job section where job seekers and job providers can share the info. ...

News, Analysis, and Opinion

Microsoft keynoter to DesignCon attendees: 'Believe!'

Day 3 DesignCon keynote: The future is optics

AMD’s Joe Macri challenges DesignCon attendees to embrace the future

Mindspeed buys PicoChip for up to $75 million

EE Times 10 most read news stories of 2011

TSMC goes it alone with 3-D IC process

Xilinx demos, ships Zynq-7000 devices

OpenCL gets upgrade, Altera tips FPGA tool

HP builds prototype for Calxeda ARM server

ARM TechCon awards celebrate excellence

 

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The Programmable Logic Designline is edited by Clive (Max) Maxfield. Here in programmable logic space (where no one can hear you scream) we are interested in anything and everything to do with programmable logic, including FPGAs, CPLDs, CSSPs, PSoCs... along with their associated design and verification tools and flows... Please contact max@CliveMaxfield.com if you are interested in submitting a technical article or a guest blog.

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