Design Article

Broadcast video infrastructure implementation using FPGAs

Tam Do, Senior Technical Marketing Manager, Broadcast/Consumer Applications Business Unit, Altera

6/7/2006 2:00 PM EDT

Introduction
The proliferation of high-definition television (HDTV) video content creation and the method of delivering these contents in a bandwidth-limited broadcast channel environment have driven new video compression standards and associated video image processing applications. Traditionally, only cable and satellite operators provided video delivery. Now telecommunication companies (telcos) are getting into this arena by using the latest video coder/decoders (CODECs) and video-processing technology to transmit digital video to the consumer via Internet protocol television (IPTV).

Video and Image Processing Trends
Many new and exciting innovations, such as HDTV and digital cinema, revolve around video and image processing, and the evolution of this technology is rapid. Leaps forward in image capture and display resolutions, advanced compression techniques, and video intelligence are the driving forces behind this innovation. Resolutions in broadcast equipment have increased significantly over the last few years, as shown in Table 1.

Table 1. Resolution by Broadcast Equipment

Advanced compression techniques are replacing previous generation technology, offering enhancements like better streaming capability, higher compression for a given quality, and lower latency. JPEG2000 is also gaining momentum in storage and digital cinema. Even as these new compression solutions are deployed, standards committees continue to enhance H.264 and JPEG2000 standards.

In the last 10 years, the digital television broadcast industry has been well served by the MPEG-2 standard for standard-definition television (SDTV). H.264-AVC (MPEG4-Part 10) and the Microsoft version, VC1, will eventually replace MPEG-2 as a video-encoding method for both SDTV and HDTV. Broadcast equipment manufacturers must provide various encoding standards in order to satisfy current and future needs. In addition to the various core video CODEC standards, there are also different types of video pre- and post-processing algorithms used to enhance the overall picture quality for the consumer.

With expanding resolutions and evolving compression, there is a need for high performance while keeping architectures flexible to allow for quick upgradeability. In addition, as a technology matures and its volumes increase, there will be a desire to reduce costs. By providing solutions for these needs, programmable logic devices (PLDs) play an important role for the emerging digital video broadcast infrastructure.

Video Content Creation
The first stage of the video broadcast chain is the professional digital video camera that captures the video and audio contents. The video can either be SD or HD. This digital camera will typically have a Society of Motion Picture and Television Engineers (SMPTE)-defined serial data interface (SDI) output. SDI is an uncompressed video stream running at either 270 Mbps (SD), 1.485 Gbps (HD) or 2.97 Gbps (1080p HD). Altera's Stratix' II GX FPGAs, with their integrated serializer/deserializer (SERDES) and clock/data recovery (CDR), processes the video stream onto the SDI output of the camera. Figure 1 shows a studio camera with Altera's Stratix II FPGA as the primary video processor. WP-BRDCST0306-1.0

Figure 1. Studio Camera With Stratix II FPGA

Video Pre/Post-Processing
The NTSC standard for television transmission, used by broadcasters in North America, has a fixed 6 MHz bandwidth for per channel. (The 8-MHz PAL standard is used in Europe and other parts of the world.) This bandwidth limitation was set long before digital television emerged. This analog bandwidth limitation dictated the current digital television (DTV) transmission specification. Digital video quality is much better superior than the classical analog video. The higher the digital resolution, the higher the bandwidth that is required to convey or transmit the video data. Delivering good quality video almost invariably requires preprocessing the source video.

Limiting the available bandwidth in the digital domain with various video compressions will manifest in different ways when displaying the decoded stream. Pushing the video compressor hard will produce block noise or blocking artifacts, due to the DCT of the block-based CODEC. Video pre/post-processing makes it easier for the encoder to compress the video, as well as further enabling it to improve picture quality and reduce delivery bandwidth requirements. This capability is of critical importance for cable, satellite, telcos, and IPTV broadcast business models where meeting high quality demands must be achieved within narrow bandwidth constraints. Some of the preprocessing may involve using 2D filtering to smooth out some of the high frequency content before it enters the encoder to reduce the amount of block noise. Altera's Video and Image Processing Suite includes 2D finite impulse response (FIR) and median filter functions. They provide a flexible and efficient means to perform 2D FIR filtering operations using matrices of 3x3, 5x5, or 7x7 constant coefficients. Therefore, pre/post-processing is a key differentiator for any type of video compression in order to have the best performance in a bandwidth-limited environment.

Video Compression
The next stage sets the course for compressing the preprocessed raw video data before transmitting to the end user. There are various generations of compression standards ranging from MPEG1 to MPEG4, with four methods for compression: discrete cosine transform (DCT), vector quantization (VQ), fractal compression, and discrete wavelet transform (DWT). Table 2 summarizes the various MPEG standards

Table 2. Compression Standards

MPEG-2 is the dominant standard for DTV across the world, with the digital cable, satellite, and terrestrial broadcasters still using this standard. As the broadcast industry trends toward more HD content, the given transmission bandwidth is under ever more pressure to make it fit into the predefined analog bandwidth spectrum. As IPTV starts to roll out on the traditional telco wiring systems, MPEG-2 definitely will not be economical or feasible for carrying video programs to consumers. The ITU-T Video Coding Experts Group (VCEG), together with the ISO/IEC Moving Picture Experts Group (MPEG), introduced the MPEG4-Part 10 (also called H.264) standard. Capable of providing good video quality at bit rates substantially lower than previous standards, H.264 does so without so much of an increase in complexity as to make the design impractical (excessively expensive) to implement. An additional goal was to allow the standard to be flexible enough to be applied to a very wide variety of applications (both low and high bitrates, as well as low- and high-resolution video) and to work well on a very wide variety of networks and systems. By using the Stratix II FPGA, Altera's intellectual property partner ATEME has introduced the industry's first single-chip SD H.264 main profile encoder for the broadcast industry (Figure 2).

Figure 2. Stratix II Single-Chip H.264 Encoder Block Diagram

There are also other compression standards such as JPEG2000, which use state techniques based on wavelet technology. The architecture should lend itself from portable digital cameras, video storage, and advanced medical imaging.


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