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Design Article

# A "How To" tutorial on logic analyzer basics for digital design

## 5/2/2007 2:24 PM EDT

Introduction
Let's assume that you need to simultaneously look at the inputs and outputs of a 16-bit counter to determine a timing error, but you have only a 2-channel scope – how do you look all of the required signals? Or let's suppose that you've just developed timing diagrams for a board full of digital circuitry. How do you verify them? What do you use to capture and analyze the signals on the board?

Without the appropriate tool, solving these kinds of problems can be very time consuming. For the above problems, a logic analyzer is the best solution. This article provides a quick overview of logic analyzer basics and offers ideas as to what can be achieved using a logic analyzer.

Oscilloscope or logic analyzer?
When given the choice between using a scope or a logic analyzer, many engineers will choose an oscilloscope. However, scopes have limited usefulness in some applications. Depending on what the user is trying to accomplish, a logic analyzer may yield more useful information.

When to use a scope:

• When it is required to observe small voltage excursions on the signal.
• When high time-interval accuracy is required.

When to use a logic analyzer:

• When one wishes to observe many signals at the same time.
• When it's necessary to look at signals in the system the same way hardware does.
• When it's required to trigger on a pattern of highs and lows on several lines and see the results.

A logic analyzer reacts the same way as a logic circuit does when a single threshold is crossed by a signal in the system. It recognizes the signal to be either low or high. It can also trigger on patterns of highs and lows presented on these signals.

In general, you should use a logic analyzer when it's necessary to look at more lines than can be monitored on an oscilloscope. Logic analyzers are particularly useful for looking at time relationships or data on a bus – for example, a microprocessor address, data, or control bus. They can decode the information on microprocessor buses and present it in a meaningful form.

When an engineer is past the parametric stage of the design, is interested in the timing relationships among many signals, and needs to trigger on patterns of logic highs and lows, a logic analyzer is by far the most appropriate tool.

What is a logic analyzer?
Most logic analyzers are really two analyzers in one. The first part is a timing analyzer, while the second part is a state analyzer.

Timing Analyzer Basics
The timing analyzer displays information in the same general form as a scope, with the horizontal axis representing time and the vertical axis as voltage amplitude. Because the waveforms on both instruments are time-dependent, the display is said to be in the time domain.

Choosing the right sampling method (inc. transactional timing): A timing analyzer is similar to a digitizing scope with one bit of vertical resolution. This single bit of vertical resolution allows the display of only two states – high or low. It cares about only one user-defined voltage-threshold. If the signal is above the threshold when it samples, it will be displayed as a 1 or high by the analyzer; by comparison, any sampled signal that is below the threshold is displayed as a 0 or low. From these sample points, a list of ones and zeros is generated, and this represents a one-bit picture of the input waveform. This list is stored in memory and is also used to reconstruct a one-bit picture of the input waveform, as shown in Fig 1.

1. Timing analyzer sample points.
(Click this image to view a larger, more detailed version)

The timing analyzer tends to square everything up, which would seem to limit its usefulness. However, the timing analyzer is the right choice if timing relationships among several or hundreds of lines need to be verified together.

It's important to remember that every sampling point uses one memory location. This means that, the higher the resolution (faster sampling rate), the shorter the acquisition window.

When data is captured on an input line with data bursts, as illustrated in Fig 2, the sampling rate has to be adjusted to high resolution (for example, 4 ns) to capture the fast pulses at the beginning. This means that a timing analyzer with a 4K (4,096 sample) memory would stop acquiring data after 16.4 µs, so the engineer would not be able to capture the second data burst.

Next:

Salman Khan Engineer

1/14/2012 5:30 PM EST

zeeglen

1/14/2012 6:38 PM EST

A combination scope/logic works good. Or run several different instruments from a common trigger and paste their displays onto the same paper timebase with a word processor. When the digital has a glitch can hekp to see this in analog mode to help deduce why.

ar2hn24

2/27/2013 10:45 AM EST