Design Article
Xilinx Spartan-6 FPGA User Guide Lite
Peter Alfke, Xilinx Inc.
8/5/2009 9:31 PM EDT
This paper gives potential users an easy-to-grasp idea of the device functions of Xilinx Spartan-6 FPGAs. It describes the functionality of these devices in far more detail than in the data sheet—but avoids the minute implementation details covered in the various Spartan-6 FPGA User Guides. In traditional product documentation, a data sheet provides concentrated information about the whole family, without describing the capabilities in great detail. On the other hand, user guides give all the details that the designer needs, but— at more than a thousand pages— they may require weeks of work to read and understand all the details.
This paper describes the capabilities (what you can do) in detail but leaves out the implementation details (how to utilize the capabilities). The idea is to give the designer enough information to evaluate the capabilities, without requiring weeks of study. This paper should create significant enthusiasm in many designers, who before did not have the patience or the motivation to study entire user guides.
General Description
Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
The Spartan-6 FPGA architecture builds on the success of the Virtex-5 family, but emphasizes lower cost and lower power consumption, using a mature 45-nm process.
The eleven Spartan-6 devices cover a wide range, from 3,800 to 147,000 Logic Cells, with up to 184,000 flip-flops and up to 4.8 Mb of internal block RAM.
Compared to custom ASIC solutions, Spartan-6 devices offer a flexible, low-risk alternative for high-volume logic designs, consumer-oriented DSP applications, and cost-sensitive embedded solutions.
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