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DP23
It's also interesting to see the number of partner and 3rd party cores in the ...
daleste
It is more expensive to develop an ASIC at the next node. You have to have a ...
FPGAs add comms cores amid ASIC debate
Rick Merritt
3/11/2013 12:23 PM EDT
SAN JOSE, Calif. – FPGA vendors are bolstering their arsenals of cores for communications systems amid reports of a decline in ASIC starts among comms systems vendors.
Xilinx announced a portfolio of cores last week targeting wired, wireless and data center systems. Its SmartCore offering of about 75 comms-specific cores is a collection of intellectual property acquired or developed in house over the last two years.
Archrival Altera said it has at least 75 comms cores in its portfolio as well. Both companies say comms equipment makers are designing fewer ASICs on average and adopting more FPGAs.
International Data Corp reported total ASIC starts declined to 2,313 in 2011, down six percent from 2002 levels. In wired comms, the decline was nearly twice as steep to 442 ASICs in 2011, down 11 percent from 2002.
Xilinx claims it has seen less than 50 ASIC starts among the top the comms OEMs this year, less than 20 of them at the 28-nm node. Vendors need system revenues of $400 million or more to justify 28-nm ASICs, said Robert Bielby, senior director of strategic marketing and business planning at Xilinx.
In a study provided by Altera, one market researcher estimated the costs of developing a new 28-nm ASIC at more than $80 and a 20-nm device at nearly $160 million. “The mind shift we have seen is they used to have to justify FPGAs, but now they have to justify ASICs,” Bielby said.
Click on image to enlarge.
Despite the figures, a Cisco chip executive said recently that Cisco is investing about as much as ever in its ASIC teams. In addition, Huawei’s silicon design division, HiSilicon, has become China’s largest fabless chip design house.
In a quarterly earnings call last year, Altera announced it lost two FPGA design wins to ASICs, at least one of them believed to be at Huawei. One analyst estimated Huawei designed 35 ASICs in 2012 up, from 24 the previous year.
FPGAs have a strong presence in high-end, relatively low-volume markets such as core optical networks, said Jag Bolaria, senior analyst at the Linley group (Mountain View, Calif.). They have also done well in traditional cellular base stations, “but as the market shifts to small cell base stations, customers want a single full integrated device and this will squeeze out FPGAs,” he said.
Related stories:
Xilinx acquires Modelware and expands communications portfolio
Study: FPGAs to grow faster than broader IC market
Intel to make 14-nm FPGAs for Altera
Xilinx announced a portfolio of cores last week targeting wired, wireless and data center systems. Its SmartCore offering of about 75 comms-specific cores is a collection of intellectual property acquired or developed in house over the last two years.
Archrival Altera said it has at least 75 comms cores in its portfolio as well. Both companies say comms equipment makers are designing fewer ASICs on average and adopting more FPGAs.
International Data Corp reported total ASIC starts declined to 2,313 in 2011, down six percent from 2002 levels. In wired comms, the decline was nearly twice as steep to 442 ASICs in 2011, down 11 percent from 2002.
Xilinx claims it has seen less than 50 ASIC starts among the top the comms OEMs this year, less than 20 of them at the 28-nm node. Vendors need system revenues of $400 million or more to justify 28-nm ASICs, said Robert Bielby, senior director of strategic marketing and business planning at Xilinx.
In a study provided by Altera, one market researcher estimated the costs of developing a new 28-nm ASIC at more than $80 and a 20-nm device at nearly $160 million. “The mind shift we have seen is they used to have to justify FPGAs, but now they have to justify ASICs,” Bielby said.
Click on image to enlarge.
ASIC costs are rising fast, according to an analysis provided by Altera.
Despite the figures, a Cisco chip executive said recently that Cisco is investing about as much as ever in its ASIC teams. In addition, Huawei’s silicon design division, HiSilicon, has become China’s largest fabless chip design house.
In a quarterly earnings call last year, Altera announced it lost two FPGA design wins to ASICs, at least one of them believed to be at Huawei. One analyst estimated Huawei designed 35 ASICs in 2012 up, from 24 the previous year.
FPGAs have a strong presence in high-end, relatively low-volume markets such as core optical networks, said Jag Bolaria, senior analyst at the Linley group (Mountain View, Calif.). They have also done well in traditional cellular base stations, “but as the market shifts to small cell base stations, customers want a single full integrated device and this will squeeze out FPGAs,” he said.
Related stories:
Xilinx acquires Modelware and expands communications portfolio
Study: FPGAs to grow faster than broader IC market
Intel to make 14-nm FPGAs for Altera
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sridhar.ps
3/12/2013 8:35 PM EDT
All these market data quote development cost of ASICs, but there is sizeable design, verification and implementation costs on FPGAs as well. The data should highlight the difference in costs between FPGA based and ASIC based development, not just the cost of an ASIC development project.
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daleste
3/12/2013 9:47 PM EDT
It is more expensive to develop an ASIC at the next node. You have to have a big volume to justify the expense. FPGAs are more expensive per unit, but the development cost can be less. It is not free, but at least you can make software changes.
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DP23
3/14/2013 7:27 PM EDT
It's also interesting to see the number of partner and 3rd party cores in the portfolios from Xilinx and Altera.
My company often uses a mix of cores from 3rd parties and the FPGA manufacturer, depending on technical characteristics, availability, reliability, and cost. Our products are also high performance, low volume using lots of FPGAs and very few (if any) ASICs.
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