Design Article

IMG1

MSC8144 features four 1 GHz DSP cores

6/21/2006 12:00 AM EDT

On May 16, 2006 Freescale announced the MSC8144, the first chip in its third generation of multi-core digital signal processors. As show in Figure 1, the MSC8144 will feature four of StarCore's latest SC3400 DSP cores operating at up to 1GHz. The rest of the chip, including memory systems and an I/O coprocessor, can operate at up to 400 MHz. The chip incorporates considerable on-chip memory, with 16 Kbyte instruction and 32 Kbyte data caches for each DSP, a 128 Kbyte L2 instruction cache shared by all DSPs, 512 Kbytes of scratchpad SRAM, and 10 Mbytes of embedded DRAM. With its substantial DSP horsepower and expanded memory, the device is mainly focused on multi-channel infrastructure applications such as wireless base stations, carrier-class voice-over-packet equipment, and media gateways.


1. The MSC8144.

The SC3400 core in the MSC8144 is considerably faster than the SC140 cores used in previous chips from the MSC81xx family. This is largely due to a substantial increase in the clock rate, enabled in part by deepening the pipeline to 12 stages from 5 in the SC140. In addition, Freescale has further increased the clock rate of the SC3400 cores in the MSC8144 by hand-crafting certain critical portions of the SC3400 physical implementation instead of relying exclusively on logic synthesis. According to Freescale, this has improved speed, area, and power by 20% or more.

For BDTI's analysis of the MSC8144, see Inside DSP.


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