Processing Algorithm Standards
Processing Algorithm Standards:
For both the PowerPC and the C6000, standards for processing algorithm libraries are
emerging. For both platforms, interoperability between algorithms, code reuse and
portability are the goals.
TI has introduced the TMS320 DSP algorithm standard. This is a set of coding
conventions and application programming interfaces (APIs), which guarantee
compatibility between processing algorithms produced by different vendors. Once
algorithms are written, they are submitted to TI for certification. This standard, in
conjunction with TI's marketing and sales support, provides a way for developers to buy
and sell processing algorithms, which will drop into an application whenever that
particular function is needed. A complete listing of available algorithms is available on
the TI web site.
On the PowerPC side, VSIPL, the Vector Signal Image Processing Library is a published
set of scientific functions calls. It is being driven by a forum of different disciplines
including: commercial, military and academic members. The standard defines only the
functions and function calls, allowing the library to be ported to any platform and the
underlying code, written by the user, can be optimized to any performance level required.
The VSIPL standard is defined in two ways: as the Core Profile, which contains 513
functions, and the Code Lite Profile, which contains 127 functions. Full documentation
is available for download from the VSIPL web site. Core Lite is also commercially
available as an executable library optimized for the 7410 from MPI Software
Board Support Libraries:
In an embedded application development environment, either on a DSP or a PowerPC,
board support libraries provided by the board manufacturer allow you to configure, test,
initialize and operate the hardware with pre-written and tested software. In a system
using an OS like VxWorks this support is traditionally delivered as hardware drivers
included with the board support package.
In non-OS based development, this support can be different from manufacturer to
manufacturer. Pentek' solution is ReadyFlow Board Support Libraries. These consist of
C-callable libraries for processor and I/O module initialization, set-up, control and
operation. The philosophy behind ReadyFlow is to provide the developer with faster
code development, but not at the cost of hardware control. ReadyFlow functions allow
software developers to access the hardware at three different abstraction levels. Highlevel
functions control global board functions like reset and synchronization.
Intermediate level functions typically control chanallized functions or control sections of
hardware with mutual functions. Low-level functions allow register level access
allowing developers complete control over all hardware functions as needed. The source
code for all functions is provided to allow users to modify or further optimize the library
as needed. Pre-written sample applications are also included which provide an out of the
box hardware check and can provide a starting point for application development.
In an OS based system, Pentek provides the functionality of ReadyFlow in a traditional
board support package with device drivers, specifically for VxWorks development on the
Model 4294 Quad G4 PowerPC.
The Pentek RTS 2501 in Figure 16 is one of several highly-scalable, real-time recording systems for acquiring, downconverting, processing, and recording wideband signals.
(Click to enlarge)
The heart of the RTS 2501 is the Pentek Model 4205 I/O Processor featuring a 1 GHz MPC7457 G4 PowerPC, mezzanine sites for both VIM and PMC modules, and two Xilinx Virtex-II FPGAs. The G4 PowerPC acts both as an executive for managing data transfer tasks as well as performing digital signal processing or formatting functions.
Attached to the 4205 I/O Processor are two Model 6236 Dual Channel ideband Receiver VIM modules, each with two 14-bit 105 MHz A/D converters, twoTI/GC1012B wideband digital downconverters and a Virtex-II FPGA.
A built-in Fibre Channel interface connects directly to RAID or JBOD arrays for real time storage to 6 terabytes and higher, at rates up to 160 MB/sec. Standard RS-232 and 100 baseT Ethernet ports allow the PowerPC to communicate with a wide range of host workstations for control and software development applications.
Scalable from four to 80 channels in a single 6U VMEbus chassis, the RTS 2501 serves equally well as a real-time system for advanced research projects and proof-of-concept prototypes, or as a cost-effective strategy for deploying high-performance, multichannel embedded systems.
Other common application examples include:
Wavelet Algorithms are commonly used in image compression and processing. Color
pixels are represented as a four-vector value: red, green, blue, alpha (alpha represents
transparency). The AltiVec processor can handle pixels as a single four-vector value
speeding up wavelet transforms 4 or more times over non-vector
Cryptography Very often cryptography algorithms deal with large integer
numbers, up to 1024-bit, or larger. The AltiVec processor is ideal for "large" number
manipulation. It's capability to shift long registers and it's permute functions are also
ideally suited to some crypto algorithms, providing a 10-15 times performance boost over
FFTs The FFT is one of the most commonly used algorithms in digital signal processing
applications and is often used as a benchmark for processor performance. There are a
number of FFTs presently available optimized for the AltiVec and the C6000 yielding
impressive results. Table 7 lists benchmarks for a 1024-point, radix 4, complex FFT for
each of the processors. The table also includes the Analog Devices SHARC and the TI
TMS320C40 for historical perspective.
The C6000 and PowerPC G4 families can deliver some of the highest performance
processing power currently available in silicon today. And while these two processor can
deliver similar benchmarks in many applications, the fact still remains that the C6000
family is based on a DSP architecture and the PowerPC is multipurpose RISC chip. With
that come the inherent differences in the processing cores, I/O interfaces, software
development environments and in general, the design philosophy that comes with each
AltiVec User's Group
Linux for PowerPC
Apple Developer Connection
About the author
Robert serves as product manager for Pentek's DSP, data acquisition and software radio products where he's responsible for product definition, education and training. Prior to joining Pentek, his background included seven years in the medical electronics industry where he designed and managed projects for ultrasound imaging. Robert joined Pentek in 1994, working as an application engineer and system integrator where he concentrated his efforts on solving customer's real-time technical requirements. In 1997, he took on the responsibility of product manager. He holds a BSCS from the New York Institute of Technology.