Design Article
PRODUCT HOW-TO: Using the Blackfin Processor for Bus-Powered USB 2.0 Compliant Designs
Gregory Coppenrath
1/21/2010 8:40 PM EST
Power Considerations
The ADSP-BF527 processor has a few unique features that allow adherence to USB power specifications. One of the most obvious ways to lower power consumption is by avoiding waste, so the ADSP-BF52x family offers four power management modes that minimize consumption when maximum processing is not needed.
The four operating modes are full on, active, sleep, and deep sleep. In addition, hibernate mode offers even greater power savings by turning off core processing.
If the USB host issues a sleep command, the attached device must reduce operating current to less than 2.5 mA. The EXT_WAKE0/1 signals are perfect for powering off regulators and components that are not necessary. Any of the four operating or hibernate modes can be used to reduce power consumption.
After entering sleep mode, the USB device must also respond to a resume command. The ADSP-BF527 has four possible wake modes from the hibernate condition: GPIO, Ethernet, real-time clock (RTC), or USB. The USB activity wake option provides the ability to comply with the USB resume command.
Section 7.2.1.4 of the USB 2.0 specification for bus-powered functions states that a device must power up in a reduced power state of less than one unit load (100 mA) with a nominal bus voltage (VBUS) of 5 V). The ADSP-BF527 lowers power consumption by lowering the CCLK and/or SCLK frequencies, and also by allowing VDDINT to be lowered.
In many systems, the CCLK and SCLK frequencies only need to be reduced to meet the power limit when the emulator is unconfigured or the host issues a USB reset. After USB enumeration, SCLK/CCLK frequencies can be increased to 100/600 MHz max. Note that 100 MHz is the speed limitation for SCLK when running at 1.8 V.
It is important to note that unconfigured current is tested by running the High Speed Electrical Toolkit (HSET), which is downloadable from usb.org. The test configures the device onto the USB, issues a USB reset, and measures the current consumption. If a design consumes more than 100 mA, it must respond to the reset command by reducing its current consumption to below the limit.
Peripheral ICs Required For USB Product
All embedded designs require support circuits including power management and reset supervisors. As an example, Figure 1 below shows block diagram for a USB device using ADI components.
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| Figure 1: Typical ADSP-BF527 USB bus-powered system architecture |
The ADP121 and ADP170 low-dropout (LDO) regulators, with their 120-s start-up time, are a perfect fit for the power subsystem of a USB device. The ADP121 specifies quiescent current of only 33 μA with a 150-mA load. An important feature of these LDOs is the enable (EN) input pin, which reduces the typical current consumption to 0.1 μA when the regulator is disabled.
ADI's broad offering of reset supervisors includes the ADM6384, which can provide a reset pulse for 1 ms, 20 ms, 140 ms, or 1.12 s, are available in a small SC70 package with a compact 2.2 mm - 2.4 mm footprint. The LDOs described above start up fast enough to allow the ADSP-BF527 processor to utilize the 1-ms reset pulse. Using an ADM6384 reset supervisor with 1-ms reset pulse leaves 99 ms for booting and signaling attachment to the USB host.
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