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Design Article

Designing low-energy embedded systems from silicon to software

Keith Odland

11/28/2012 5:03 PM EST

page 2

Appropriate process technology. An appropriate process technology exists for every feature set. The answer is not simply to rely on one process technology that has the lowest theoretical leakage just because the device will spend a long time in sleep mode. During sleep mode, it is possible to disable power to large segments of the MCU, taking the leakage component out of the equation. Leakage is a bigger issue when circuits are active, but the advantages of advanced transistors that switch far more efficiently can easily offset it.

As an example, the leakage current of a 90-nm process is approximately five times higher than that of a dedicated low-power, 180-nm process. The active-mode power consumption is a factor of four lower, but this is based on a far larger figure.

Take a 180-nm MCU with an active current consumption of 40 mA and a deep-sleep-mode consumption of 60 nA and compare those power levels with the power levels of a 90-nm implementation that is able to drive the active current draw down to 10 mA but draws a higher sleep-mode current, of 300 nA. The MCU must be active 0.0008% of the time for the 90-nm implementation to be more energy efficient overall. In other words, if the system is active for just 1 sec per day, the 90-nm version is approximately 1.5 times as energy efficient as its 180-nm counterpart. The conclusion is that it is important to understand the application duty cycle when selecting a process geometry (Figure 2).


Figure 2 Trade-offs between process technology and duty cycle affect power optimization.

Once the appropriate process technology has been selected, the IC designer has the option to optimize energy performance further. When it was introduced, the concept of clock gating was applied at a relatively coarse level. Clock gating increases the complexity of a design because the circuit designer needs to be aware of which logic paths will require a clock signal at any given time.

Clock distribution. Most MCU implementations use a hierarchical structure to distribute clock signals and the appropriate voltage levels to each part of the IC. The functional units, such as instruction processing blocks and peripherals, are organized into groups that are each fed by a separate clock tree and power network. A frequency divider or multiplier derives the clock signal for each group from a common clock source. Similarly, if the groups require different voltages—an approach that is becoming increasingly common—a set of power transistors and voltage regulators will deliver the voltage to each group of peripherals.

To minimize design complexity, MCUs have used a relatively simple clock-gating scheme in which entire clock trees are disabled as long as no functional units inside a group are active. This scheme, however, allows logic that is performing no useful work to be clocked in groups that are active. For example, the adder unit in a CPU core might receive a clock even if the current instruction is a branch. The switching triggered by the clock signal within that adder increases power consumption by a factor of CV²f, as described earlier.

Improvements in design tools and techniques have made it possible to increase the granularity of clock gating to the point where no peripheral or functional unit receives a clock signal if it has no work to perform during that cycle.

Voltage scaling provides further potential energy savings by making it possible to deliver a lower voltage to a particular group of functional units when required. The key to delivering the appropriate voltage to a group of functional units or peripherals lies in the implementation of on-chip voltage regulators or dc/dc converters and the use of monitoring circuits to ensure that the IC operates at the required voltage.

Power-supply considerations. On-chip voltage regulators provide the system designer with greater flexibility, making it possible to extract more charge from a battery. For example, an on-chip switching buck converter, as in Silicon Labs’ SiM3L1xx MCU products, can be used to take the 3.6V of an industrial battery and convert it to 1.2V at more than 80% efficiency. Many MCUs do not have this feature and use linear components to drop the voltage to the right level with a greater degree of waste. In advanced implementations, the buck regulator can be switched off when the battery has discharged to such a level that it no longer makes sense to perform the conversion. As a result, the power supply can be optimized for energy efficiency over the lifetime of the device, all under software control.


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