Xilinx Inc. has revamped its entire product portfolio to address its core communications customer base, as well as nontraditional PLD markets such as PC, automotive, and consumer products.
Process migrations and architectural enhancements have resulted in 21 new products, which will begin sampling today. Foundation- and Alliance-series software, which supports the new devices, began shipping this summer.
"We are doubling the performance of previous-generation FPGAs and offering increased density at a price that is half that of other FPGAs in the market," said Sandeep Vij, vice president of marketing at San Jose-based Xilinx.
The XC9500XL 3.3-V CPLD family features 4-ns pin-to-pin speeds and system frequencies up to 200 MHz. The 0.35-micron, flash-based family consists of four devices containing 36 to 288 macrocells. With volume prices ranging from $1.20 to $11.95, Xilinx anticipates the CPLDs will find their way into new markets, including high-end PC and server motherboards, peripherals, and automotive systems.
A "re-layout" of the workhorse XC4000 FPGA architecture has resulted in the XC4000X series, consisting of two separate families that Xilinx says will double performance and density while halving power and compiling time.
The XC4000XLA 3.3-V family comprises eight devices with 26,000 to 80,000 system gates. Aimed at high-density ASIC replacement, the devices start at $11.80 in large volumes.
The high-density XC4000XV family consists of five devices with up to 500,000 system gates. Geared toward high-performance DSP applications, 100,000-piece pricing starts at $132 for the 220,000-gate XC40110XV.
The high-volume, low-cost Spartan FPGAs have also been migrated to a new process, yielding the 3.3-V SpartanXL family. With on-chip RAM, IP-core support, and 5,000 to 40,000 system gates, the devices will debut in mid-1999, starting at $2.95 in large volumes.