Wielding its Multibank memory architecture, MoSys Inc. today will break into the embedded-IC market with a high-speed DRAM core and a design win in the desktop PC graphics space.
With a 512-bit-wide on-chip bus, the 133-MHz Multibank DRAM (MDRAM) "megacell" offers 8.5-Gbyte/s peak bandwidth and a sustained data rate of nearly 8 Gbytes/s, according to MoSys, Sunnyvale, Calif. Densities of 4 to 32 Mbits are being offered, manufactured on the 0.35-micron process of foundry partner Taiwan Semiconductor Manufacturing Co. Ltd.
After playing in the discrete market for several years, mostly in high-speed graphics applications, MoSys is turning to the embedded market to deliver low-latency, high-end devices that are less price-sensitive than commodity DRAM.
Predicting a growth industry, San Jose-based analyst firm Dataquest Inc. projects that revenue of ASICs and ASSPs shipping with embedded DRAM will increase from $326 million this year to more than $1 billion in 1999.
Unlike most discrete DRAM chips, which have access rates in the 70- to 90-ns range, a 16-Mbit MoSys core at-tains a 9-ns random access cycle time, with a 32-bank device lowering average access times to just 7 ns, the company said. At the heart of the design lies MoSys' Multibank architecture, which allows each Mbit memory block to be activated as an independent bank.
Competing wide-bus architectures must frequently go off-page to search for data, expending valuable time precharging pages and executing row and column cycles, according to Andr?? Hassan, MoSys' director of marketing. The Multibank design, on the other hand, enables one bank to be accessed while a different bank is being precharged.
"By partitioning the architecture into smaller structures, you can improve the performance of the core," Hassan said.
While such precise control requires additional logic, MoSys said it can pack 4 Mbits of DRAM into a core measuring only 17 sq. mm, with each additional Mbit of memory taking another 2.75 sq. mm of silicon. "Our overhead is very controlled and very small," Hassan added.
MoSys has already landed a design win in a desktop graphics controller from San Jose-based Stellar Semiconductor Inc., which is targeting high-end niche markets.
"[Graphics] is probably the one area where it makes the most sense-where you have a small amount of DRAM and you're looking for very high performance," said Steve Cullen, an analyst at In-Stat Inc., Scottsdale, Ariz.
In a departure from the traditional per-bit pricing structure, MoSys will license its MDRAM core to TSMC foundry customers, taking a royalty payment in return. Cores based on TSMC's 0.35-micron embedded-DRAM process are available for design, with 0.25-micron cores scheduled for production in the second quarter of 1999. MoSys is also working to embed other memory cores, such as SRAM, according to Hassan.