Using its copper interconnect process technology and a 0.15-micron design rule, Motorola Inc. has introduced its first ultra-high-speed SRAM, an 8-Mbit Late Write device with a clock rate of greater than 333-MHz.
The device, which contains about 60 million transistors, also demonstrates the industry's continued move to 8-Mbit SRAM densities. IBM Microelectronics last week rolled out an 8-Mbit double-data-rate device the company claims will achieve a 600-MHz peak clock rate.
The Motorola chip, which uses extremely fine 0.15-micron linewidths, also delivers level 2 cache performance using 50% to 75% less power than pervious Motorola SRAMs, according to the company.
"This aggressive process technology and leading-edge circuit design enables us to provide our networking and computing customers with a solution which will allow them to utilize larger SRAM cache sizes with substantially lower power," said Gary Pederson, operations manager of Motorola's High Performance Computing SRAM group.