Tailoring its devices to meet the growing bit densities of DSPs, Integrated Silicon Solution Inc. has rolled out a 3.3-V ?? 24 familyof high-speed asynchronous SRAMs aimed at cutting component count, power consumption, and board space in products such as telecommunications infrastructure equipment.
The IS61LVx chip line features access speeds as fast as 8 ns, and is designed using the 0.25-micron CMOS process technology ISSI developed with foundry partner Taiwan Semiconductor Manufacturing Co. Ltd.
The 128-Kbit ?? 24 IS61LV12824 supports 100-MHz DSP applications and replaces three 128-Kbit ?? 8 SRAMs, according to Tom Doczy, vice president of sales and marketing for ISSI, Santa Clara, Calif. The company has also rolled out the 9-ns 64-Kbit ?? 24 IS61LV6424 and the 8-ns 32-Kbit ?? 8 IS61LV256.
The family's wide, ?? 24 option allows system designers to match the memory needs of 24-bit DSPs emerging from the likes of Motorola Inc. and Analog Devices Inc., without having to add more chips or pay for unused memory. The 24-bit-wide buses of new processors, for example, require three 128-Kbit ?? 8 devices or 3 Mbits of SRAM. In applications needing less memory, the same bus demands can now be met with a single 64-Kbit ?? 24 device while using two fewer chips and half the SRAM density, according to ISSI.
"In some applications, you end up having a dozen or so DSPs on a board," Doczy said. "Then add to that the memory that's required to support it, and you end up having a very densely populated board."
ISSI is aiming its new SRAMs at telecom equipment, and has worked closely with Motorola to optimize the devices for cellular base stations. Motorola's Semiconductor Products Sector will serve as a second source for the SRAM, Doczy said.
The device family marks a continuing trend by SRAM suppliers to optimize their products for communications markets rather than for the PC cache designs that dominated the SRAM applications landscape earlier this decade.
"In the communications area, where you're talking about high-performance DSPs, I'd say this is a unique part," said Jesse O. Huffman, an analyst for In-Stat Group, based in Cameron Park, Calif.
The 32-Kbit ?? 8 chip, meanwhile, is designed as an external tag RAM for cache- memory applications. The device is available in 28-pin SOJs and TSOPs for $1.25. ISSI's 64-Kbit ?? 24 SRAM is priced at $6 and ships in 100-pin TQFPs and PQFPs. The 128-Kbit ?? 24 chip is $13 in a 100-pin TQFP and $15 in a PBGA package. All quantities are in 10,000s. The chips will reach volume production in the third quarter.