SANTA CLARA, Calif. -- While Intel Corp. has indefinitely delayed the Camino or Intel 820 chipset due to signal integrity issues are worked
out, workarounds have been proposed that could allow systems to
The problem, revealed Thursday night by Intel to top-tier OEMs,
concerns a decline in signal integrity when a third memory slot is used in
conjunction with the Camino chip set, according to Intel's customers and
industry sources (see Sept. 24 story).
Some issues with platforms supporting three RIMM module connectors have been identified, according to Rambus Inc., and Intel, Rambus and the OEMs are working to quickly resolve them. "Intel is committed to working with Rambus, the Direct RDRAM suppliers and its customers to validate the Intel 820 chip set, and the
systems that use it, as soon as possible," said Pete MacWilliams, an Intel Fellow, today in Santa Clara.
A chip-set redesign is likely in any event. If that is
the only solution available, then the adoption of Direct Rambus DRAM will
be pushed out one to three months while a new version is designed,
analysts said. The question on the minds of all involved is whether a
board-level fix can be implemented to allow systems to ship in the
interim. More details are expected Monday, but not through an official
press release from Intel.
A number of workarounds have been proposed,
according to industry and OEM sources. The most popular suggestion is that
Intel Camino-equipped PCs could still be shipped with a cap covering the
third memory slot, preventing OEMs or users from adding more memory and
destroying the stability of the system. However, it was still unclear
whether signal fluctuations in two-slot implementations still
An Intel spokesman
declined to comment. Representatives for Rambus Inc., Mountain View,
Calif., said that the problem was in a combination of the chipset,
motherboard, and BIOS, but not the memory itself.
"There are no known
problems with the RDRAM," said Subodh Toprani, vice-president and general
manager of logic products at Rambus.
Instead, the issue concerns some of
the 1,000 or so permutations of three-slot Rambus boards, Toprani said.
RIMMs can be populated with 4-, 6-, 8-, 10-, 12-, or 16 device
configurations, each running at PC600, PC700, or PC800 speeds.
Furthermore, each RIMM can use one of two connector configurations, with
or without error correction code (ECC).
Top-tier OEMs discovered the
problems last week, sources said. Thursday night, Intel made the
information generally available across the industry, advising OEMs to use
two-slot memory configurations and ECC memory for the time being.
addition to the cap proposal, Intel may release stringent design
guidelines that allow error-free Camino systems to ship, but in limited
configurations, and without the flexibility to modify board layouts and
The delay will still add a new level of complexity to the
Rambus rollout, already in disarray after an earthquake struck Taiwan
early last week. Even Intel's top motherboard suppliers were caught
absolutely flatfooted by Intel's disclosure.
The most significant
indication of the seriousness of the problem was the fact that top-tier
OEMs, including Dell Computer Corp. and Compaq Computer Corp., publicly
confirmed that the problem will delay the shipments of Camino-equipped
PCs. OEM officials said they were not willing to populate the systems with
only 512 megabytes of DRAM, the maximum allotted by the two memory slots.
Micron Electronics Inc. in Nampa, Idaho, said earlier it would use a
competing chip set from Via Technologies Inc. because of the estimated cost
of Rambus DRAM.
Analyst Peter Glaskowsky of MicroDesign Resources Inc. in Sebastopol, Calif.,
said a chip set redesign could push out Camino's launch one to three
months. In the meantime, OEMs will be virtually forced to purchase Intel's existing 440BX chip set -- whose supply has increased steadily in
the past weeks -- or select Via's Apollo Pro Plus 133 with PC133 SDRAM.
Industry sources also said early last week that they had discovered that
the close proximity of Direct Rambus inline memory modules (RIMMs) created
a thermal environment of up to 50 degrees centigrade in certain
concentrated areas. However, the existing signal integrity problems
apparently were aggravated by the additional heat, analysts
Sources said Intel presented a complex multilayer motherboard
reference design at its Intel Developer Forum last month in Palm Springs,
Calif. But the delays in sampling the Camino chipsets delayed the
discovery of the signal problems -- involved in the timing of the board --
until the final stages of the process.
The quickest way to solve the
timing problem with three RIMM slots, sources said, is to shorten the
memory bus line, now 10 cm long. Industry sources now believe Intel is
trying to do exactly that. But if Intel cannot design a workaround as
expected, then existing boards will have to be scrapped pending a
"If that's true, then you've got to really question . . . the
fundamental implementation," said Scott Randall, analyst with SoundView
Technology Group in Stamford, Conn. "Intel had better be calling somebody on
the carpet, whether it's Rambus, the Camino designers, or the motherboard
If nothing else, any delays will allow the supply of Direct
Rambus memory to increase, noted Sherry Garber, analyst at Semico Research
Corp., Scottsdale, Ariz.
"When the RDRAM-based platforms are released they will have passed substantial, broad, and rigorous system-level testing," said Dave Mooring, senior vice president of Mountain View, Calif.-based Rambus Inc. "The goal of Rambus and our partners is to provide a solution at a higher quality standard than what occurred at prior memory transitions."
Rambus' stock plunged Friday, down 18% to finish at 71 1/8.