Claiming to take the lead in chip manufacturing, Intel Corp. today entered the 0.13-micron race by announcing a new process technology complete with copper-interconnects and low-k dielectrics. The company will move its new 0.13-micron technology into production in the first half of 2001, but it declined to give an exact timetable for product introductions based on the process.
Intel's new high-speed logic process, called P860, is a six-layer copper-interconnect technology based 130-nm design rules. The 1.3-volt technology also features a 0.07-micron gate length (70-nm design rules) as well as the industry's smallest gate-oxidethickness and SRAM cell, according to the company.
The Santa Clara, Calif.-based chip giant will announce more details about the process at the IEEE International Electron Device Meeting (IEDM) in San Francisco next month.
In the meantime, Intel hopes to move its 0.13-micron process technology into production by the first half of 2001, said Sunlin Chou, vice president and general manager of the Technology & Manufacturing Group at Intel.
The new process will enable Intel to develop and make microprocessors with more than 100 million transistors, with speeds exceeding 1-GHz, Chou said.
"We have successfully developed our 0.13-micron technology," he said during a conference call to press and analysts today. "We have built functional SRAMs and microprocessors using 130-nm design rules."
Initially, the company will ramp up its 0.13-micron process in its 200-mm fabs in early-2001. The first fab to ramp up this process will be Fab 20 in Oregon, but the company will also transfer the technology to three other 200-mm plants in the second half of 2001.
By the first quarter of 2002, Intel hopes to move the process to its initial 300-mm plant, dubbed DIC.