The February release of the Quartus-II 2.0 design environment will mark a turning point in Altera Corp.'s software strategy, the San Jose PLD company said today.
With the updated tool suite, Altera will for the first time support all of its major product lines with one software package.
Additionally, although it's increasing its overall investment in software development, the Quartus-II 2.0 programmable logic tool suite will deemphasize certain internally developed functions offered in the past, like design entry and synthesis, integrating them instead from among commercially available EDA tools, according to Tim Southgate, vice president of software and tools marketing at Altera.
From now on, Altera will channel its software efforts specifically into products that enhance the silicon architecture, such as place and route or DSP design tools, Southgate said.
Part of the reason is the increasing complexity of designs customers are creating using Altera's PLD architectures. It's not uncommon, for example, to see users combine in an Excalibur device elements of hardware, software, and DSP, each of which requires a different engineering discipline, he said.
"In the good old days of five years ago, a PLD company literally supplied all the tools designers needed," Southgate said in an interview. "Now with all these issues going on we have to supply a quite diverse set of tools. We've decided that the best way to do that is to look at the best technologies available out there. Our value added in the EDA space is to integrate commercial tools into a really easy-to-use solution for customers."
Some of the areas in which Altera continues to advance its software development include Quartus-II features like SOPC Builder, which automatically creates the most efficient routing path between design blocks. Another is DSP Builder, a bridge tool that converts DSP algorithms into logic.
Additionally, for the 2.0 release, the company has developed a C-code compiler based on GNUpro that will allow designers to create Nios or ARM processor-based Excalibur devices using the same tool flow. Ordinarily, each processor architecture would require a proprietary tool chain. The Altera program is also designed to speed up hardware/software co-simulation, something that commercial tools can't do, Southgate said.
"We can write a good model for this because we know what the target architecture is," he said. "Our tools can achieve 500,000 instructions per second emulation performance."
Version 2.0 also enables an average 15% improvement in design performance, Altera claims. The tools were developed alongside Altera's next-generation PLD architectures to more efficiently match the two.
Altera said it continues to "aggressively invest" in software, although the company declined to break out its outlay as a percentage of R&D. After doubling its software engineering resources in 2000, Altera has about as many people working on software as on hardware, noted Peter Wu, director of software and tools marketing.
Version 2.0 of Quartus-II is slated to ship in February to current Altera software licensees. Annual subscriptions are $2,000.