RICHARDSON, Tex. -- Texas Instruments Inc. could add a third silicon foundry to provide 0.13-micron CMOS copper processes for logic products as part of a new manufacturing strategy aimed at outsourcing up to 50% of the company's most advanced ICs from third-party wafer fabs in the next couple years, said a TI executive during briefings with analysts here.
The overall target of the new strategy is to increase TI's profitability in the next upturn cycle by reducing costs and the risk of idle capacity in leading-edge processes, while increasing the company's use of outside chip foundries.
TI's overall foundry use will increase from about 10% today to as much as 20% once the new strategy is in place. The big change will come in leading-edge logic, which will account for most of TI's increase in foundry usage during the next several years. TI officials said this "leading-edge" outsourcing will also be beneficial to foundries, which are looking for customers to help fill up their new, expensive wafer fabs.
Four weeks ago, the Dallas-based company disclosed its first strategic foundry pacts with Taiwan Semiconductor Manufacturing Co. Ltd. and United Microelectronics Corp. in Taiwan, which are qualifying versions of TI's 0.13-micron copper processes for production by the middle of 2002.
The addition of a third advanced logic foundry could help to protect TI and its chip customers from potential shortages of ICs, if market demand surged in a strong recovery after last year's severe downturn. Under the strategic foundry agreements, TI is forecasting on its capacity needs in 0.13-micron copper technology, but it is not entering into guaranteed "take or pay" pacts that lock the company into commitments for space on fab lines, said managers during the briefings.
In the future, TI aims to qualify strategic foundries with its most advanced logic processes about the same time it prepares its own wafer fabs for the technology, said Kevin Ritchie, the company's senior vice president of worldwide manufacturing operations. With the current 0.13-micron generation, TI's DMOS6 300-mm wafer fab in Dallas is now ramping production of the copper process at the same time TSMC and UMC are working to qualify the technology.
Counting TI's 200-mm "KFab" development and pilot facility in Dallas, the company will soon have four production sources for its 0.13-micron (130-nm) technology--counting the two existing strategic foundry pacts, Ritchie said. A third foundry could be added to the 0.13-micron generation, said the vice president.
"These processes [at the strategic foundries] will be specified to our own electrical parameters," Ritchie told analysts during a series of briefings that continue today in Richardson near TI's Dallas headquarters.
"We are not using the standard processes at foundries. We tell them what the device has to look like, from a drive and capacitance point of view," he explained. "TSMC and UMC use their capability to modify their processes to meet our electrical performance requirements. We tell them that the oxide needs to be 100 angstroms thick, and they make it 100 angstroms. How they do it is up to them, and how we do it, they don't know."
"We are not transferring or licensing our process technology to them," he told analysts while fielding questions on Wednesday.
In addition to potentially expanding its roster of advanced logic foundries, TI is now shifting its existing foundry relationship with Anam Semiconductor Inc. in South Korea from digital ICs to mixed-signal devices. Over the past five years, Anam has licensed TI's 0.35-, 0.25-, and 0.18-micron CMOS technologies for its foundry fab, but now the Korean chip maker is preparing to apply those processes to mixed-signal ICs for the Dallas-based company.
TI expects to expand its outsourcing of mixed-signal chip products from about 8% today to a range of 10-to-15%, Ritchie told analysts during a technology workshop session on Wednesday.
"Across all of TI's products, foundries account for about 10% of our ICs, and it could go up to 20% when this [new manufacturing] strategy is fully implemented," Ritchie told analysts during a series of briefings that continue today in Richardson near TI's Dallas headquarters.
Ritchie indicated that TI was now in the early stages of deciding whether it wanted a third logic foundry--in addition to TSMC and UMC--but he was not prepared to identify candidates.
Under TI's new foundry strategy, which has been developed over the last 18 months, the company plans the greatest use of outside wafer fab capacity in the leading-edge technologies, Ritchie said. In advanced logic processes, peak-to-peak leading-edge capacity requirements occur in two-year cycles, he said. The peak-to-peak cycles in mixed-signal, analog ICs, and standard logic occur at a slower pace, he said.
For example, mixed-signal process technologies now have a three-year peak-to-peak production capacity cycle, and they ramp down over five-to-seven year period, while advanced logic products quickly end after the two-year peak--which increases the risk of overcapacity in new fabs, Ritchie said.
TI plans the greatest use of outside foundries in leading-edge logic ICs during the rest of this decade, Ritchie said. A similar plan is being developed for TI's new 90-nm (0.09-micron) technology generation.
But TI currently plans only to have one outside foundry for mixed-signal ICs--which has now been identified as Anam. The company expects to continue to produce nearly all of its advanced analog ICs and standard logic devices in its own wafer fabs because these products have longer lifecycles between technology generations. There is also less risk in having too much capacity, Ritchie explained.
To help to protect against shortfalls in advanced logic capacity, TI is currently planning to run its DMOS6 300-mm fab at 85-to-90% utilization as it ramps production of the 12-inch wafers, said the manufacturing VP. Currently, the new Dallas fab is running 3,500-to-4,000 wafer per month and ramping to 5,700 per month by June. TI has recently decided to install a second phase in the 300-mm fab with tools to increase capacity to 10,000 per month by the end of this year.
"One manufacturing model does not fit all products, and we have a spectrum of products," Ritchie said, referring to TI's range of processors, wireless ICs, ASICs, mixed-signal chips, analog, and standard logic devices. The company is aiming to tailor its internal and external manufacturing strategies to each type of product and will adjust the amount of outsourcing based on market conditions, product lifecycles, and other factors this decade, Ritchie told analysts.
"We will adjust [the foundry targets] periodically," he said. "At 0.13-micron, I could pretty much tell you what the balance will be, but at 0.09-micron, we will re-evaluate the availability, economic conditions and adjust the balance," he added. "I will not say there is a fixed [percentage] number for foundries."
Ritchie estimated that the new foundry and manufacturing strategy could help TI to raise its gross margins for profits by 3-to-6 percentage points over the 0.13-micron process generation compared to the company's previous approach of using only its own plants for advanced technologies.