Although ASIC design starts have dropped significantly over the past year, the good news, according to a speaker at the Memcon Boston conference Tuesday, is that growth will return to the market.
The bad news is that ASIC starts will never return to same levels as the industry experienced at the end of the 1990s, according to Steve Sutton, vice president of Texas Instruments Inc.'s ASIC business.
"The market will recover, but it will look different," Sutton said.
ASICs have become so complex that design and production costs have skyrocketed, resulting in a limited number of new wafer starts, he said.
The common perception is that the extremely high photomask costs at 0.13-micron and 90nm-processing nodes will constrain new ASIC starts.
But while mask costs may jump as high as $1.5 million for 90nm processing, that is only part of the economic problem, Sutton added.
"TI is spending more in custom processing, custom testing, and physical design than on masks," he said.
Sutton also said as ASICs shrink to the 90nm node and chip speeds increase, signal integrity issues become huge.
As a result, timing margins must be customized for each different advanced ASIC.
Signal integrity design and testing must also be done end-to-end from the die through interconnection to the package itself, he added.
"Custom packaging for ASICs will also become the norm," Sutton said. "Pin counts are getting so high that you can't contact all pins" in a test.
The Memcon Boston conference was organized by Denali Software Inc., Palo Alto, Calif.