LOS GATOS, Calif. Most designers would say they know what a "behavioral" model is or what "cycle-accurate" means. But because such terms are used differently by individuals and companies, the Virtual Socket Interface (VSI) alliance is trying to define a common nomenclature in its latest specification: the System-Level Design Model Taxonomy.
This new document is a product of VSI's System-Level Design Development Working Group (SLD DWG) and is available for public review at VSI's Web site, at www.vsi.org. The authors are requesting e-mail commentary, which can be directed to email@example.com.
The document's intent is to establish a taxonomy, or classification, of the different types of electronic system models. It outlines general modeling concepts, defines supporting terms, and discusses the components of system, architectural, hardware and software models.
"Basically, within the system-level DWG, we felt there was a lot of confusion about terminology," said Mark Genoe, SLD DWG chair and manager at Alcatel Microelectronics. "People are using common terms with different meanings, or different terms to describe the same models."
The working group used a document produced by the Rapid Prototyping of Application Specific Processors (RASSP) program as a starting point. This document, "RASSP VHDL Modeling Terminology and Taxonomy," was released by Lockheed Martin Advanced Technology Laboratories in June 1997.
While the RASSP document tends to focus on signal processing, the SLD DWG extended the terminology to cover a much broader application domain, said Grant Martin, SLD DWG member and senior architect for the R&D organization at Cadence Design Systems. He said the DWG is working to define new types of models.
The document starts by defining "taxonomy axes" that include five characteristics-temporal precision, data precision, functional precision, structural precision and programming abstraction level-as they range from high to low levels of abstraction. The temporal precision axis, for instance, ranges from gate propagation in picoseconds to "partially ordered events," which are specified in terms of precedence but not specific units.
The temporal precision axis also provides definitions for such terms as system-event accurate, token-cycle accurate, instruction-cycle accurate, cycle-approximate accurate, and cycle accurate. The latter term, for example, is defined as the level at which cycle counts are available for each instruction that is processed according to a regular system clock.
The data precision axis ranges from bit logical values to "tokens," a level at which there are no implementation details at all. The functional precision axis ranges from Boolean operations to mathematical relationships. The structural precision axis ranges from full implementation to "black box" representations.
The software programming precision axis represents the granularity of the software instructions that are interpreted by the model of a hardware component. Levels of resolution range from object code to "major modes," in which the software is described in terms of searching, tracking, or initialization.
A section on general modeling concepts defines three model classes-behavioral, functional nd structural. A behavioral model describes the function and timing of a component without defining an implementation. A functional model also has no implementation, but describes function only. A structural model is expressed in terms of interconnections of components.
While common usage assumes that a "behavioral" model is at a higher level of abstraction than a "structural" model, the VSI document notes that all three model types can exist at any level of abstraction.
It goes on to describe specialized model classes. It begins a discussion of computational models by describing a data-flow graph model, leaving other types of computational models to be defined in future versions.
The spec defines terms used to describe models of digital systems, such as "executable specification," which denotes a behavioral description as seen from the object's interface when executed in a computer simulation.
Specified architectural models include token-based performance, abstract-behavioral, data-flow graph and instruction-set architecture. Hardware models range from a detailed behavioral model to a circuit-level model. Software models range from pseudo-code to object code.
A final section of the document defines a long list of "supporting terms."
SLD DWG members who contributed to the document represent such companies as Lockheed Martin, Cadence, Fujitsu, Alcatel, Rockwell, Nortel, ARM, Sony, Nokia, ECSI, Synopsys, Mentor Graphics, Easics, National Semiconductor, SES, Symbios and Philips.