With the proliferation of electronics-enabled appliances, games and devices, the appetite for semiconductor content is enormous. However, as the market has expanded, the requirements have become very stringent: millions of gates with high utilization, all running with low power. The requirements for silicon solutions today are light years beyond what satisfied electronics companies only a few years ago.
One factor in the expansion of the semiconductor market is a new category of performance-driven applications. These include advanced multimedia applications such as HDTV, videoconferencing, interactive multimedia and high-speed communications. Fast growing already, those applications are poised for explosive growth. Yet there are a few realities holding them in check-for now.
Performance is necessary but not sufficient. Performance must come with silicon and cost efficiency, and with judicious use of power. As if those constraints were not enough, high-growth applications tend to be in the elusive consumer market, where standards are evolving rapidly-and competing-and where missing a market window can make or break a year's worth of revenue. The challenge is to deliver performance-driven, efficient silicon solutions rapidly.
Interestingly, those lofty expectations are somewhat the fault of the semiconductor companies now struggling to meet them. Dramatic advances in process technology spawned deep-submicron technology, ushering in the promise of the system-on-chip (SoC). Surely, with all of those millions of gates, the ability to mix logic and memories, macrocells and cores, buses and more, true SoC would be a realizable goal.
That has not been the case. Instead, semiconductor vendors are rushing to provide cores and trying to build a "virtual board" on silicon. However, customers need advanced capabilities and customization, not standard parts tied together on a single die; in short, they need custom silicon.
Deep submicron has expanded the market space for custom silicon, leading to a widening gap in the sweet spot of a market once adequately covered by a variety of alternatives. The smaller geometries have changed some of the fundamental relationships between components. Today's design methodologies are stretched to the breaking point trying to accommodate those new physical relationships and requirements.
The result is The Design Gap. We have the silicon. We have tools and methodologies. Why don't we have an efficient way to create SoCs? Today's alternatives are effective for a portion of the enormous silicon solution market. However, the middle of the market is still searching for answers.
FPGAs still play a role in the low-performance, low-volume segment of the market. Microcontrollers and DSPs deliver a solution to the single-function or midperformance portion. DSPs have been successful for design starts for some new markets-they take less time and design dollars than ASICs.
More and more, DSPs and microcontrollers are combining to deliver mixed-control (microcontroller) and computation (DSP) solutions. However, that combination is not able to address a true multifunction digital solution or deliver the silicon efficiency for those higher-volume design starts. SoC ASICs are a high-performance, highly silicon-efficient solution as well as the only answer for a complete mixed-signal SoC. But at what cost?
The design costs associated with achieving the handcrafted efficiency and performance of an SoC ASIC are very high. Specialized ASIC designers are needed, along with costly and complex tools. Most important, time is required. That means it is no longer cost-effective to risk an ASIC proj-ect on any but the highest-volume design starts. Often, especially in dynamic consumer markets, that means taking a very large gamble. Can you really be sure that video standard will be the right one in 15 months? Will that communications interface still be right for your target market?
Not every product is the next Sony Playstation. SoC chip vendors need to expand the customer base for SoC to reduce their reliance on blockbuster products, opting not just for profitability but for long-term viability. SoC ASICs are expensive for the SoC chip vendor; they are expensive for the systems vendor. To top it off, projects to develop them are unpredictable and success is far from guaranteed.
Coupled with this volatility in the semiconductor market is the phenomenon of microsegments of a larger market and the notion of mass customization of consumer products. The world of microsegments and the ability to customize at will is the new reality for semiconductor vendors.
SoC ASICs must support multiple, rapidly evolving standards and shifting market requirements. For example, the audio coding mar-ket includes multiple standards like Dolby AC3, AAC, MP3 and a multitude of streaming standards emerging on the Internet, as well as the increased adoption of surround-sound systems. What is the right combination of audio functions for the set-top box of the future? The same chip will have similar struggles with video, communications and interactive capabilities and standards.
Customers need to be able to define and modify the system, and therefore the chips in them, quickly, as the market is evolving. Long-term prediction is too difficult and risky, short-term delays too costly. Product life cycles are too short, rapid product turnaround is the only way to sustain market share. What is needed is a product platform that allows rapid development and redesign without significant up-front costs.
Programmable hardware offers a rapid path to market. FPGAs have been used for years to quickly provide custom logic parts without the need for custom IC design. Logic synthesis filled in the "programmable" gap for gate-array ASICs by isolating design in RTL (register-transfer level) from place and route implementation. But the silicon capacity and application requirements far exceed the abilities of those programmable solutions. Gate-array technology provided a platform for FPGAs and for logic synthesis. What is the platform for SoC programmability?
While there is a lot of talk in the industry about so-called "platforms," most of those solutions simply take existing technologies and pull them onto a single die. However, deep-submicron capacity coupled with the ability to mix memory and logic on-chip opens up new possibilities for constructing platforms that do not exist in the board-level world. A truly configurable platform is one that provides full general-purpose, software programmability and can also be easily integrated into a larger system.
Improv has created a new platform, called the Programmable System Architecture (PSA), to take advantage of the strengths of deep-submicron technology. The PSA is a unique, modular configuration of multiple, heterogeneous very long instruction-word processors.
One of the key challenges of the PSA was to create an innovative platform for multimedia and high-speed communications that could easily be integrated into the existing industry structure. In addition, we wanted to provide high value and efficiency for both semiconductor and systems vendors. The PSA does both.
For the semiconductor vendor, the PSA represents a way to bring deep-submicron technology to the masses. They can support chips for lower-volume applications because the implementation, verification and manufacturing costs can be leveraged over multiple customer projects. They can fill fab capacity by providing programmable chips as the fab comes online rather than having to wait for design libraries, design kits and sign-off qualification.
The systems vendor can create customized, high-performance chips rapidly and get innovative products out to market quickly. Design costs are low and design engineers do not need IC specialization, only applications expertise.
Programmable platforms make it economical to do more mid- and even low-volume design starts, actually increasing the odds for that big design win. Product respins and functionality changes are weeks of work instead of months.
Those platforms are not FPGA replacements. They are a solution to deliver true multifunction applications-digital SoCs. The markets are performance-driven and silicon efficiency is an important factor. The PSA approach is ideally suited to dynamic markets that have active microsegments or changing standards and functionality requirements. Current markets where configurable platforms are visible are in consumer multimedia and high-speed communications.