NEW ORLEANS Mentor Graphics Corp. and Synopsys Inc. released a second edition of the Reuse Methodology Manual (RMM), the seminal the reference book on design reuse, at this year's Design Automation Conference.
The edition comes on the heels of Cadence Design Systems Inc.'s release of its own book on design reuse.
Mentor and Synopsys also announced OpenMore, an assessment program that measures how reusable a given block of intellectual property (IP) might be in a system-on-chip design. The software will be available free from both the Mentor Graphics and the Synopsys Web sites by the end of the year.
OpenMore will merge the guidelines of the expanded RMM with the existing rules and guidelines of Synopsys' original More program. Moreover, OpenMore will incorporate new measurability criteria for the design and verification of soft, firm and hard IP, and will also include key deliverables specified by the Virtual Socket Interface (VSI) alliance.
Aart de Geus, chairman and chief executive officer of Synopsys, said that "More answered the call for a common evaluation method for IP, and in less than a year, over 1,000 users have accessed More as a measure of reusability."
With the upcoming OpenMore tool, assessment data will be able to be entered into a spreadsheet; OpenMore will prompt the IP provider to determine how closely the 200 rules and guidelines described in the original RMM have been followed. The software then assigns weighting and percentages to reach a final assessment.
The better the assessment, the greater the confidence that an IP core will meet design requirements.
Key industry organizations said they will support OpenMore, including VSI, the Semiconductor Industry Association, Rapid, VCX, and Design & Reuse.
Michael Glenn, a product management executive from Avant! Corp. (Fremont, Calif.), said his company's Nova Explorer RTL tool provides hard data on the reusability of an IP core and checks for conformity with the rules in the first edition of the RMM. Glenn credited Mentor and Synopsys for announcing plans to provide access to their tool free, but said that Avant!'s Nova Explorer provides hard metrics on reuse compliance, while Synopsys' existing More tool gives more subjective feedback on the relative strengths and weaknesses of an IP block.
"Sixty to 70 percent of any IP assessment is in checking hard rules, but the rest of the job is in interpreting tradeoffs in how they implemented the guidelines," said Pierre Bricaud, a director of Mentor's IP Division, and a coauthor with Mike Keating of Synopsys of the RMM. "You will never replace the fact that you have to leave room for the flexibility and creativity of engineers." he said.
Bricaud and Keating said they expect to keep the RMM at about 300 pages, though some sections may be revised as new practices emerge in the future. The duo could also team up on a separate work or works that address special cases, such as design reuse in analog, Keating said.
The two companies intend to expand their cooperation on design reuse initiatives, though they would not be specific on how or when that would happen.
Wally Rhines, president and chief executive officer of Mentor, said the new edition of the RMM incorporates industry experience in the form of best-practice guidelines for design reuse and verification. "The key feedback incorporated in the new RMM involves timing closure based on locality, fresh details on low-power design, new work on verification and testbench development, and the modeling and physical integration of soft, firm and hard IP," he said.
"The RMM," according to de Geus, "is even more important than the original Carver Mead book on IC design."
Both Synopsys and Mentor were quick to note that the RMM was not intended to be a standard, but was rather intended as a reference to be used by IP providers and designers to assess reusability. The book's guidelines and design examples provide the underlying methodology to establish a best-practice IP reuse process for system-on-chip designs, the companies said.
For example, the book states that successful reuse stems from partitioning, solving major issues and verifying block by block.
By following the guidelines for low-power design and those that show how to use the registering of block inputs and outputs, for example, designs can achieve portable, reusable IP with minimal impact on timing, area and power, the companies said.
The RMM also includes guidelines on when and how to use verification tools in the reuse process, with strong emphasis on implementing verification strategies at the beginning of a design process, instead of at the end, which is more typical.
The expanded 300-page manual is published by Kluwer Academic Publishers.
Over 8,500 copies of the original RMM have been distributed in the past year.