SAN JOSE, Calif. Following the lead set by Mentor Graphics Corp. and Synopsys Inc. with their Reuse Methodology Manual (RMM), Cadence Design Systems Inc. has announced the publication of a how-to book for design reuse. Titled "Surviving the SoC Revolution: a Guide to Platform-Based Design," the book is being previewed at this week's Design Automation Conference.
What's different about the Cadence book is its focus on platform-based design, which some see as an alternative to the synthesis-centric, ASIC design methodology assumed by the RMM. "We felt we were observing some new and interesting trends in system-on-chip [SoC] design, in particular the platform-based approach, and had something useful to say," said Grant Martin, senior R&D architect at Cadence (San Jose, Calif.), and one of the book's authors.
Grant defined a platform as "a mechanism that allows you to do a very rapid derivative design by pre-assembling and qualifying basic architectures and components into an organized design approach." A platform-based chip will thus have predefined clocks, buses, a processor, a real-time operating system, and probably some pre-built intellectual property (IP) blocks.
Some platform-based designs may allow differentiation through custom hardware IP blocks. But with others, the differentiation may come about through programmable logic or embedded software. If this design style takes hold, it's conceivable there will be fewer hardware designers and more software designers in the future.
Platform-based design is coming on strong today for some applications, such as wireless design, basestations, multimedia, and automotive, Martin said. "Each application may focus on different styles of platforms," he noted.
Martin said the Cadence book is complimentary to the RMM. "The RMM guidelines for IP authoring are actually quite important if you're going to build a platform," he said.
Other authors of "Surviving the SoC Revolution" include Cadence staff members Harry Chang, Larry Cooke, Merrill Hunt, Andrew McNeily and Lee Todd. The book's forward was written by Alberto Sangiovanni-Vincentelli, professor of electrical engineering and computer science at U.C. Berkeley, and Cadence's new chief technology advisor.
The 300-page Cadence book is divided into ten chapters, including chapters on SoC definitions, an introduction to platforms, functional co-design, communications networks, developing the integration platform, analog and mixed-signal design, and software design. Kluwer Academic Publishers will publish the book in September.