SAN JOSE, Calif. The Virtual Socket Interface alliance, a standards group for silicon intellectual-property (IP), this week will release its Virtual Component Transfer (VCT) specification, which promises to ease the search, evaluation, selection, integration and verification of cores for system-on-chip designs.
Takeshi Fuse, chairman of the Virtual Component Transfer development working group and manager of IP strategy at Fujitsu Ltd., said the VCT Specification 1, version 2.0, which can be downloaded from the VSI Web site, provides a detailed description of the requirements for core documentation and transfer.
"The spec establishes basic criteria for the types of information that need to be transferred from a VC [virtual component] author to a VC user," said Fuse. "What we do in this document is specify by item the information that must be provided to a user. It serves as a foundation to help users quickly establish a standard adoption process."
Fuse said the spec defines a superset for core documentation, along with core catalog selection data, guidelines for core evaluation and qualification information. It also defines integration guidelines, application notes and functions, contact information for technical support and transfer formats for the entire evaluation package. The spec also defines reference information for tools, libraries, interface specs and so on.
VCT also includes a table of deliverables, with currently used formats for each of them and a classification of information deliverables for hard, firm and soft cores.
In this classification, VSI rates the information to be provided by the core author as "mandatory," "conditionally mandatory," "recommended" or "conditionally recommended."
The VCT calls for core authors to provide several items: claims for a core's functionality as well as nature and completion of the specific core; the system and logical description, interfaces, integration requirements, abstract models, timing and electrical characteristics; tool flow and methodology information on applications; test information and requirements for analog and mixed-signal cores; and supplier information, which would include core package guidelines.