SAN JOSE, Calif. Moving forward with its plan to build system-on-chip devices with FPGAs, Altera Corp. this week is launching a program to provide processor cores for its million-gate Apex family of parts.
The program is called Excalibur and will feature hard cores from the ARM and MIPS camps, as well as an internally developed soft core, called Nios. Altera plans to sell the cores bundled with its own Quartus software as well as with GNUPro tools prepared by Cygnus Solutions (Sunnyvale, Calif.), now a subsidiary of Red Hat Inc.
In addition to the cores, Altera has devised software intended to support the process of deciding which functions belong in hardware and which in software. Although not as radical a step as hardware/software codesign, Altera managers said the capability should help the two spheres of design meld more easily.
Processor cores won't be earth-shattering for Altera's larger customers, but they might help smaller companies that can't afford ASIC mask costs, said Cliff Tong, vice president of marketing. In addition, Altera has already cemented royalty agreements with ARM and MIPS, which will free smaller companies from having to negotiate those payments, the company said.
Expandable data path
Nios is a configurable, 16-bit soft core with a data path that can be expanded to 32 bits. It is first being developed on a 0.18-micron manufacturing process and will shrink along with Altera's other product lines. GNUPro tools exist for ARM and MIPS, and Altera has paid Cygnus to port GNUPro to Nios as well.
The use of familiar software "gives us a jump on some of these reconfigurable-processor guys," Tong said, referring to such newcomers as Triscend Corp. (Mountain View, Calif.).
Altera considers Nios a core for lower-performance functions those requiring less than 50 million-instructions-per-second performance with the hard-core ARM and MIPS packages better-suited for complex tasks. Possible implementations could include a MIPS or ARM core surrounded by Nios-based peripherals, said Bryan Hoyer, senior director of systems products at the company.
"We will see people buying MIPS and ARM processors and putting in Nios cores as intelligent peripherals," Hoyer said.
All three cores use a single software tool SOPC (system-on-programmable-chip) Builder for the early stages of design. The C-based tool produces both hardware and software output files for the design. The hardware file is fed into Altera's Quartus tool; the software design is output to the Cygnus GNUPro tools.
SOPC Builder was designed in part by Boulder Creek Engineering (Santa Cruz, Calif.), which was acquired by Altera a year ago.
The decision to place functions in the hardware or software camps normally comes very early in the design, but SOPC Builder will allow that decision to be delayed, said Hoyer. It creates hardware connections based on the user's choices of intellectual property blocks, providing a clearer view of the trade-offs incurred when moving a function out of software and into hardware, or vice versa. That kind of perspective has "been missing from the microprocessor market," Hoyer said.
Excalibur products are intended for such markets as multiprocessor applications, video display and communications. Low-end portables and cell phones are not in the cards yet because the low prices they command make them less suitable for FPGAs, and because Altera avoids the integration of memory and analog components.
The Nios core is available now for $995 as part of a development kit that includes the Quartus and GNUPro tools, with SOPC Builder bundled into Quartus. ARM and MIPS kits are scheduled to become available in the fourth quarter, with pricing estimated in the $1,000 range.