In 1984, when Paul Marino joined Motorola in Israel to help design the company's first digital signal processing device-the 56001-the world was a very different place. The heyday of mainframes had come and gone, personal computers were king and embedded computing had barely been defined.
Marino, now chief DSP scientist for Motorola Semiconductor, went on to become project leader for Motorola's first floating-point DSP, then program design manager for the company's flagship architecture, the 56300.
Today, DSP is a large focus of system-on-chip (SoC) designs. "In the coming years, true SoCs will proliferate, while designers will architect systems to support a multitude of processors that will meet DSP needs," Marino said, referring to both homogeneous and heterogeneous processors. The key, according to Marino, is not just to glue together onto the same die what used to be on several dies, but rather to architect the system, using hardware and software co-design tools, for optimal performance.
Marino started building his own personal vision for DSP vs. general-purpose computing back in the early nineties. "It was around that time we realized the world was moving from a computer-dominated world to an embedded-dominated world," he said. "And in my view, the epitome of embedded computing was the DSP. However, it has become obvious over the last five years that the boundaries between microcontrollers and DSPs have blurred."
While this blurring is evident, three features of DSPs remain to separate them from mainstream processors. The first, according to Marino, is determinism: "To do something that is DSP is to do something in real-time." As the samples of voice, sound or images come at a constant rate, it is crucial, Marino explains, that the old sample be processed before the new one arrives. "If you can't do that, then your result will be wrong, and there's no way to fix that. If it's late, it's wrong," he said. "The fundamental concept in real-time processing that defines DSPs is that they're predictable in their execution," he said.
The second distinguishing feature of DSPs, according to Marino, is the high bandwidth between the memory and the computation units. "In DSPs, you always have to process not one piece of information but two at the same time," he said. In the case of a finite input response (FIR) filter, for example, the first bit piece is the data and the second piece is the coefficient.
Power consumption is DSP's third distinguishing feature. "The fact is that CPUs and even microcontrollers are still one or several orders of magnitude higher in terms of power consumption because they are not optimized for mobile environments or low-power-consumption environments," said Marino.
|Paul Marino, chief DSP scientist at Motorola, focuses on finding ways to cram more DSP intelligence in system-on-chip solutions. |
"Unlike desktop computing, where the buyer focuses on price and megahertz, what counts in embedded computing, where the buyer doesn't even see the processor, is functionality," said Marino.
The functionality and the sophistication of the algorithms required to make these machines help make our life better has changed dramatically, he said. Marino sees it as a self-propagating phenomenon: the industry is creating more powerful machines that stimulate developers and academia to create more sophisticated algorithms that, in turn, require even higher performance. "This cycle continues at a rate that exceeds Moore's Law," he said. "Yet the demands of the wireless world, both for voice and now wireless data, culminating in 3G, continue to put considerable burdens on the computational requirements of the systems," he said. This by itself, Marino asserts, has created a revolution in DSPs.
Marino is adamant that the best way to meet communications demand is through DSPs. "The hardwired solution that may be easier to implement may not be adequate," he said. "A programmable solution allows for field upgrades, and with ever shortening design cycles, the ability to put out bullet-proof designs is questionable; a DSP will allow you to upgrade," he said.
Unfortunately, not all DSPs fit all applications. Those doing directional antennas or medical imaging in real-time need high levels of computation and can take a hit on power. But for those in a portable device, power and cost take priority. "Our advanced researchers tell us they want infinite MIPS at zero current at zero dollars," said Marino.
Because it is difficult to optimize in all directions, many vendors have several families of DSPs. "This approach doesn't work either," said Marino, who explained that the shortage of engineering talent to support the various architectures, combined with the need for customers to migrate to new architectures as their applications become more demanding, void this model.
Incorporating multiple processors on a single die could solve a major issue facing chip makers. "As Moore's Law takes us to smaller and faster devices, the manufacture of these chips is becoming increasingly expensive, with fabrication costs running into the billions of dollars," said Marino.
To meet demands in the coming years, Marino sees process technologies moving to copper interconnects, low-K dielectrics, and lithographies below 0.1 micron. "This will give lower power and higher performance by minimizing the parasitics and overall dimensions," he said.
Design tools and methodologies will have to improve as frequencies breach the 1-GHz barrier and the basic limits of the transistor threshold. "It will call for a different set of tools and methodologies. It's not a free ride," he said.
For modeling and verification three to five years out, Marino sees increased levels of abstraction in design and system validation and increased focus on design for test and validation methods.
For circuit design, his road map calls for constraint-driven design with unified treatment of timing and signal integrity, and simultaneous analog/digital/RF analysis at multiple levels. Physical verification will need analysis of the effects of smaller geometries, hierarchical timing capability, and automated power grid and decoupling capacitance optimization.
"These tools present a bottleneck for DSP development over the next three to five years," said Marino. "While some IC vendors are developing their own tools in-house, we plan to partner and work with established houses to get these tools developed quickly," he said.
Though architecture, processes and design tools are all important, "they all work hand in hand," he said. "You cannot have one without the other. If you drive your process technology without the tools and methodologies, you'll fall flat on your face. Each feeds the other."