TAIPEI, Taiwan Taiwan Semiconductor Manufacturing Co. said Wednesday (April 18) that it has made significant progress ironing out the basic design rules for 0.10-micron process technology and will work closely with customers to fine tune the process.
The announcement comes on the heels of chief executive officer Morris Chang's confirmation that TSMC's average utilization rate is turning anemic as the semiconductor industry downturn settles in. "With current market outlook, the utilization rate of TSMC fabs may drop to 50 percent or even lower in the coming few months," Chang said in a statement. The company stressed, however, that it will stay above the break-even point in the second quarter and through the rest of the year.
TSMC has previously said the semiconductor slump will not significantly alter its technology road map. With its Wednesday announcement, the company is trying to edge out rivals by leading the way to next-generation process technology. By seeking earlier collaboration with customers, the company said it hopes to speed the ramp-up of the 0.10-micron node and shorten the time-to-market cycle for its customers' products.
"The customers that intend to use our 0.10-micron technology will probably start designing for it now so they have to know when this technology will be available so they can plan the introduction of their product," said Chiang Shang-yi, TSMC's senior vice president for research and development.
TSMC is not expecting to enter pilot production with a 0.10-micron process until the third quarter of 2002. Chiang said the company has completed the basic modules for the process and is working with potential customers, such as integrated device manufacturers, to give them a clear idea of TSMC's process specifications. Because the 0.10-micron node will enable a more complex level of integration, the company wants to make sure that other critical components, such as intellectual property and design libraries, will be in line with the process, he said.