High-density interconnect (HDI) printed circuits are being designed in ever-increasing quantities. HDI brings some interesting new solutions to age-old signal integrity (SI) concerns-concerns that will grow as rise times continue to drop.
This article focuses on five major areas of SI concerns: reflections, crosstalk, simultaneous switching, electromagnetic interference (EMI) and interconnect delays. In each case, HDI offers improvements and alternatives, but it is not a panacea. A couple of "cautions" are listed that can be major stumbling blocks to HDI implementation. Fortunately, they are not SI-based.
The materials used in HDI are important to SI. Although not the focus of this article, the materials selected, as well as the dimensional stack-up and PCB design rules, will influence SI and electrical performance (impedance, crosstalk and signal conditioning). Miniaturization provided by HDI will be a major contributor to SI performance.
The benefits of HDI
The widespread use of new electronic components employing ball grid array (BGA), chip-scale packaging (CSP) and other evolving technology form-factors means new fabrication techniques must be used to create printed circuit boards (PCBs) that will accommodate parts with extremely tight lead pitches and small geometries. In addition, extremely fast clock speeds and signal bandwidths challenge systems designers to find better ways to overcome the negative effects that radio frequency interference (RFI) and EMI have on their product's performance. Finally, increasingly restrictive cost targets are compounding problems associated with today's smaller, denser, lighter and faster systems.
Staying competitive and delivering the products people want means seeking out and embracing the best available technologies and design methodologies. The use of PCBs incorporating microvia circuit interconnects is currently one of the most viable solutions on the market. Adopting microvia technology means products can utilize the newest, smallest and fastest devices, meet stringent RFI/EMI requirements, and keep pace with downward-spiraling cost targets.
What is microvia technology?
Microvias, as the name implies, are vias of 6 mils (150 microns) or less in diameter. Their most typical use today is in blind and buried vias used to create interconnections through one dielectric layer within a PCB. Microvias are commonly used in blind-via constructions where the outer layers of a multilayer PCB are connected to the next adjacent signal layer. Used in all forms of electronic products, they effectively allow for the cost effective fabrication of high-density assemblies. The IPC has selected "high density interconnection structures" (HDIS) as a term to refer to all of these various microvia technologies.
Why use microvias in PCBs?
From a physical and electrical standpoint, microvias offer several distinct advantages over their mechanically created counterparts. Systems with higher circuit densities and better electrical performance can be created using the smallest and most advanced components available. As a result, smaller, lighter and more robust products can be built1. The major benefits are:
- Lower costs through board size reduction (easily up to 40%) and layer elimination (up to 33%).
- Product size reduction (lower substrate weight, thickness and volume).
- Increased wiring density (lower component spacing with more connections per component).
- Higher density at a lower cost - At higher densities, HDI costs less per connection.
- Improved reliability - The thin nature and 1:1 aspect ratio of microvias deliver increased reliability over larger drilled through holes.
- Improved electrical performance (signal integrity) - HDI has one-tenth the parasitic-inductance and capacitance-of through-holes, fewer stubs, less reflections, less ground bounce and better noise margins.
- Lower RFI/EMI - Since ground planes are closer to or on the surface and distributed capacitance is available, RFI/EMI is significantly reduced.
- Improved thermal efficiency - The thin dielectrics and higher Tg's of HDI improves thermal performance.
- Greater design efficiency - Microvias allow ease of part placement on both sides of an assembly, as well as improved component escape routing (via-in-pad).
- Faster time-to-market - 100% completion by HDI autorouters because of placement and easier inner layer free space routing.
Lower PCB costs
As density increases past eight layers, HDI boards can usually provide this density at a lower cost. When complex blind and buried vias are produced by sequential lamination, a simpler HDI board will usually cost less.
Increased circuit density
Because microvias can be incorporated within the pad structure, there is a major reduction in fanout. Microvias provide not only additional gains in routable area, but also improved cost-effectiveness during manufacture. Greater via density per given area provides a greater number of routing tracks per the same area. The benefits of this are twofold: Designers can place components in much closer proximity to each other while achieving a corresponding increase in trace routable area.
Routability area gains increase the potential for a PCB layer count reduction in the design and for a physically smaller form factor gained through increased circuit density. This allows for better component placement, improved layout options and better electrical performance.
Advanced package technology enabled
Thanks to microvias, designers can incorporate the newest high-density chip packages into their systems. This is especially valuable when using components such as full array packages, CSPs and direct chip attach (DCA) designs. PCBs created using conventional through-hole fabrication technology have physical pad sizes and mechanically created through-holes that cannot support new-generation components that incorporate fine line geometries.
Greater layout efficiency
Microvias allow ease of part placement on both sides of an assembly, as well as improved component escape routing (via-in-pad) leading to easier inner-layer free space routing and 100% completion by HDI autorouters.
The thin nature and 1:1 aspect ratio of microvias deliver increased reliability over larger drilled through-holes. HDI boards have long been used in European military, transportation and spacecraft. Data is available from IPC's ITRI [www.itri.org] on reliability testing of HDI multilayers.
Improved thermal performance
The thin dielectric and higher Tg's of HDIS materials lead to improved thermal performance. Many complex enhanced tape BGAs are made of thin, laser-drilled polyimide film.
Better electrical performance
Due to the physical structure of microvias, there is a reduction in switching noise. This is attributable to the decreased inductance and capacitance of the via as its physical size becomes smaller and shorter. A microvia will have nearly one-tenth the electrical parasitic of a through-hole. Another advantage of using microvia technology for creating interconnects is a reduction in signal reflections and crosstalk between traces. The corresponding increase in routability area also allows designers to place traces further apart when necessary to reduce crosstalk.
In the realm of RFI/EMI, increased routability area combined with the microvias' physical via-in-pad implementation allows designers to place more ground plane around components. By doing this, the size of ground return loops decrease and improved RFI/EMI performance is realized. These benefits are highlighted in Figure 1.
Signal integrity and electrical performance
I am certainly not a signal integrity expert. The information presented in this section has been presented before by experts such as Dr. Eric Bogatin of GigaTest Labs2 and Dr. Paul Franzon of NC State University.3 These experts have done a very good job in training me and I hope that my explanations here do them justice. I recommend that you download several excellent papers by Bogatin from the GigaTest Web site [www.gigatest.com].
Signal integrity improvements are certainly available to all who take the time to respect "Mother Nature." HDI's contribution comes mainly from the adage, "Smaller and closer is better!" HDI's main contribution is miniaturization. The SI improvements for HDI comes from three phenomena:
1. Reduction of noise;
2. EMI radiation reduction; and
3. Improved signal propagation and lower attenuation.
There are really only four different categories of noise that describe all the various effects2:
- Signal quality of one net and its return path (ringing due to reflections).
- Crosstalk between two or more nets (noise pulses due to switching on neighboring lines).
- Switching noise (noise on power and ground lines/planes).
- Electromagnetic interference (EMI).
Bogatin gives a simple illustration of this in Figure 2 and Table 1.
Noise can come from many sources-many created by the layout of the board. These include:
- Change in trace width
- Plane splits
- Cutouts in power/ground planes
- Via anti-pads
- Insufficient plane capabilities
- Excessive stubs, branched or bifurcated traces
- Component lead frames
- Improper impedance matching and termination networks
- Coupling between signals
- Varying loads and logic families
Signal quality of one net
HDI is a fabrication technology of miniaturization. We are able to "kill two birds with one stone" because shorter interconnect length, smaller vias and thinner dielectrics of lower dielectric constant materials not only make the substrate smaller, they also improve signal integrity!
With HDI, devices can be brought so close together that the signal may not need to be terminated. This is not just close from a surface point of view, but also the secondary or backside of the interconnect can be utilized effectively. Interconnects with a time delay shorter than about 20% of the rise time of the signal may not need to be terminated.2 The interconnect length is given by:
The signal return path is just as important as the signal path. (It exists whether you provided for it or not.) It contributes to the inductance, capacitance and resistance experienced by the signal. The signal return current will seek the path of minimum energy, which is the least impedance. For low frequencies, this path will be the least resistance, but for high frequencies, it will be the path that minimizes the current loop. At higher frequencies, inductance dominates resistance, so the return path follows the signal path even though this is higher resistance.
The low dielectric constant results from the use of many new HDI materials. Many of these are not glass-reinforced and thus have lower dielectric constants than glass-reinforced laminates. Many of these dielectrics are liquid such as the high-Tg epoxy or polyimide, or the photodielectric resins (PDR). Some are thin-vacuum laminated dielectrics with high thermo-plastics contents. However, all are uniformally thin, and this contributes to reductions in wiring delays and reduction in noise. Figure 3 shows the characteristic impedance for a fine-line HDI microstrip (3 mil trace) with two dielectrics of Dk equal to 3.5 and 4.5. The lower Dk allows the dielectric thickness to be nearly one to one-half mil thinner.
HDI miniaturization provides shorter interconnect lengths, and if the lower dielectric constant material is used then crosstalk in HDI substrates is.reduced. From Bogatin's paper,2 an example is presented here: "A typical line width in HDI technology is 3 mils (75 microns). Figure 3 shows the characteristic impedances of 3-mil-wide traces for various dielectric thicknesses. The dielectric thickness will be less for a lower dielectric constant. This means a lower dielectric constant material system will either result in less crosstalk for the same spacing, or the traces can be moved closer together and have the same amount of cross talk."
According to Bogatin's paper: "The variation in the near-end crosstalk coefficient with separation for two 50-ohm microstrip traces is shown in Figure 4. In the two cases studied, the line width was three mils, and the dielectric thickness was adjusted so that for the two different dielectric constants, the line impedance was the same. From these curves, it can be seen that if the routing pitch is crosstalk constrained, just the lower dielectric constant of the HDI material system may allow a board to shrink up to 28%. For coupled lengths less than the saturation length, the magnitude of the near-end voltage noise will scale with length. The saturation length will depend on the rise time. For a rise time of 1 nanosecond, the saturation length with an effective dielectric constant of 2.5 is about 7.6 inches, which would include many of the traces in a small card application. The relative coupled near-end noise would be given by..."
Crosstalk in HDI substrates is reduced by the shorter coupled lengths and by the lower dielectric constant. This reduction can be as much as 50%. Shorter trace lengths will radiate less, and traces with thinner dielectric will radiate less. If you look at the example in Figure 5, the shorter the coupled length, the less the mutual inductance (Lm). The thinner the traces, the less the mutual capacitance (Cm). Moreover, the thinner the distance to the reference plane, the lower the near-end crosstalk will be or the same crosstalk for a longer coupled length. With length reductions of 2x and dielectric thickness reductions of 2x over conventional boards, the radiated field from HDI signal loops might be reduced by as much as 4x, which is 12 dB.
Look for part II of this article in the next issue of Printed Circuit Design.
Happy Holden is manager of advanced technologies for Westwood Associates, West Haven, CT. He is responsible for next generation Printed Circuit Manufacturing Technologies, advanced design tools and design consulting. Prior to joining Westwood, he was a consultant with TechLead Corporation, and had been at Hewlett-Packard for over 27 years. Mr. Holden formally managed Hewlett Packard's application organizations in the Far East and holds degrees in chemical engineering and computer science. If you have questions for Mr. Holden he can be contacted via e-mail at: firstname.lastname@example.org
1. Holden, Happy, "Micro-Via Printed Wiring Boards: The Challenges of the Next Generation of Substrates and Packages," Future Circuits International, Vol. 1, 1997.
2. Bogatin, Eric, "Signal Integrity and HDI Substrates," The Board Authority, Vol 1(2), June 1999, pps. 22-26. (A .PDF copy is available for download at www.bogatinenterprises.com.).
3. Franzon, Paul, "Electrical Modeling, Simulation and Design of Interconnects," Vol.1-Design, a short course by NC State University, Nov. 8-11, 1998.
4. Charbonneau, Richard, "A Comparison of Through-Hole and Microvias in Printed Circuit Design," The Board Authority, Vol.1, No.2, June 1999, pps. 88-94.
5. Strange, Rod and Doyle, Greg, "Getting a Grip on Crosstalk" Printed Circuit Design, November 1998, pps 32-35.
6. Bird, Steve, "Designing Out Emissions," Proceeding of IPCWorks'97, Oct. 5, 1997, Arlington, VI .
7. Bird, Steve; Brist, Gary; and Stewart, John, "Advantages of Microvia Formation Using DYCOstrate Technology," SMI, September 1996.
© 2001 CMP Media LLC.
9/1/01, Issue # 1809, page 8.
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