AUSTIN, Texas A long legal battle was expected when Saifun Semiconductors Ltd. filed a patent infringement suit against Advanced Micro Devices Inc. and Fujitsu Ltd. in February, but the three companies on Wednesday (July 31) announced an agreement that will see AMD and Fujitsu use Saifun's technology in their ongoing effort to develop flash memories capable of storing four bits per cell.
The agreement also calls for AMD and Fujitsu to invest an undisclosed sum in Saifun (Netanya, Israel), and for all parties to drop legal claims against each other.
The AMD-Fujitsu approach will marry multilevel flash technology, in which separate bits of information are represented by different levels of electronic charge, and multibit technology, in which separate bits are created in a nitride layer of a single cell.
While AMD-Fujitsu's MirrorBit flash memory technology and rival Intel Corp.'s StrataFlash technology today stores two bits per cell, flash memory makers are looking to create devices that store more bits to satisfy the demands of such applications as 2.5G and 3G cell phones, which support such data-heavy services as the transfer of music and photo files.
Kevin Plouse, vice president of technical marketing and business development at the flash unit of AMD, said the Saifun lawsuit had created concern among AMD's shareholders that the MirrorBit rollout this quarter would become entangled in a drawn-out courtroom battle just as AMD is gaining design wins at major customers such as Nokia and Cisco.
"What got our attention is when Saifun dropped a lawsuit on our desk. We looked at what they were doing and were very impressed, so we decided to invest and collaborate with them," Plouse said.
Saifun has four-bit-per-cell prototoypes working in its laboratory, and the agreement with AMD and Fujitsu will accelerate AMD's plans to introduce multibit, multicell technology by at least half a year, Plouse said.
As a result, AMD may be able to bring four-bit-per-cell products to market as early as 2004, in device densities of 1 Gbit or higher.
Plouse said AMD aims to build a cell that would be 3.5 times larger than the lithographic feature size. AMD plans to build on that basic cell architecture for flash products aimed at data storage applications.
Saifun founder Boaz Eitan, who once worked at Intel's non-volatile memory operation, "holds many patents in the non-volatile memory field, including multilevel-cell technology," said Kobi Rozengarten, chief operating officer at Saifun. In a telephone interview, Rozengarten said he did not want to discuss the lawsuit that preceded the companies' agreement, which he called a "win-win" for all parties. "We want to talk about the future, not about the past," he said.
"Our approach is three times smaller than our competitors', and we use the same approach for code flash, data flash, and EEPROM," he said.
Saifun has 120 employees in Israel, and another 60 working at Ingentix, a flash memory card joint venture with Infineon Technologies AG. That joint venture will continue even as Saifun transfers its technology to AMD and Fujitsu. "There may some overlap with Ingentix," AMD's Plouse said.
Saifun is also involved in a joint venture with Fairchild Semiconductor International for EEPROM devices, samples of which are now shipping.
While most flash devices used in cell phones to date have been for code storage, the fastest growing part of the market is for data storage flash devices. These serial-type chips connect a switching transistor with multiple capacitors, from 32 to 1,024 bits connected in a serial mode that provides higher bit density but slower first access times.
AMD's goal is to have four-bit-per-cell devices ready in time to gain design wins with the 3G phone vendors. Plouse said the advent of multimedia data streams creates a storage challenge that can best be met by multi-gigabit-level flash devices. "This is a massive market developing for wireless data that will account for more than 40 percent of flash bits when 3G phones become established," he said.
AMD is currently shipping 64-Mbit density MirrorBit parts capable of storing two bits per cell, like Intel's StrataFlash technology. StrataFlash uses four different levels of charge to store two bits.
AMD will bring MirrorBit parts in 16-bit, 32-bit, 128-Mbit and 256-Mbit densities to market over the next two quarters. When the company's 0.13-micron flash process is ready next year at a fab jointly operated by AMD and Fujitsu in Japan, the companies plan to bring 512-Mbit MirrorBit parts to market, Plouse said.
AMD and Fujitsu are converting all of their high-density flash product line to the MirrorBit approach to challenge Intel, which currently dominates the high-density flash market.