TOKYO In an effort to revitalize Japan's semiconductor industry, 11 of the country's semiconductor companies have announced the formation of the Advanced SoC Platform Corp. (Aspla). The government-supported R&D company was established to develop a common base for the design and manufacture of semiconductors using 90-nanometer technology.
"Aspla's objective is to standardize design and process," said Satoru Ito, chairman of Aspla, who is a former president and chief executive officer, semiconductor and integrated circuits, at Hitachi Ltd.
The 11 companies are the member companies of the Semiconductor Executive Committee of the Japan Electric and Information Technology Industries Association (JEITA).
Six of the 11 companies in Aspla Fujitsu, Hitachi, Matsushita, Mitsubishi, NEC and Toshiba invested $1.3 million each, and will act as development partners to carry out practical research and development. The six partners will send a total of 150 engineers to Aspla, and will share the cost of operation, which is estimated to be about $85 million. These companies' 90-nm processes will be "completely unified," said Keiichi Kawate, president and chief executive officer of Aspla, a former information technology executive at Toshiba.
The remaining five companies, Oki, Rohm, Sanyo, Sharp and Sony, each of which contributed about $85,000, will support the activity. The six major investors will invest another $1.3 million in Aspla next March, to increase Aspla's total capital to about $16 million from the startup capital of about $8 million.
Starting operation next week, Aspla plans to build a 300-mm wafer pilot line at a facility in Sagamihara this fiscal year. "The selection of equipment is almost done," said Osamu Kudo, executive vice president and chief technology officer of Aspla.
The Semiconductor Technology Academic Research Center (Starc) consortium proposed a standard last August for intellectual-property-based system-on-chip design technology set for the 90-nm generation. Aspla's unification of design and process will be based on this standardized design technology. "Starc plans to release about 500 IP [intellectual property] libraries for 90 nm this year," said Toyoki Takemoto, president of Starc.
Aspla plans to establish a standard process for the 90-nm node in the first half of 2003 and develop derivative processes in the second half.