SAN FRANCISCO Research at the University of Tokyo and at Advanced Micro Devices Inc. dangles the possibility of using quantum-well technology to breathe new life into flash memory.
Papers by the two research teams, presented at the International Electron Devices Meeting here this past week, use existing materials and processes, but in very clever ways, to produce quantum-size features far beneath the resolution of the lithographic equipment.
Both rely on a quantum-scale medium to trap charge in between the gate and the channel of a conventional MOSFET. Significantly, both also use silicon materials as the charge-trapping medium, eliminating the problems associated with ferroelectric, magnetoresistive and chalcogenide materials, which are also being explored for next-generation flash.
Such materials are all showing promising results in one way or another. But in the end they are what they are: new materials, with only slightly understood behaviors. That's the reason the non-volatile-memory breakthroughs from the University of Tokyo and Advanced Micro Devices (Sunnyvale, Calif.) created such a buzz at IEDM.
It is easy to dismiss quantum devices as figments of nanotechnology research, with effects too small and unreliable, or structures too weird, to be of any use in a production process. But the papers from the University of Tokyo and from thoroughly practical AMD might change that perception.
The existing flash memory cell, though it has proven much more robust than many had predicted, appears unlikely to survive much beyond the 65-nanometer process node. The dimensions at that point become simply too small for durability and charge retention to hold up, leading to flash cells that either fail after only a few erasures or rapidly lose their data.
Nonetheless, work continues to shrink conventional cells, either by clever scaling or by substituting new materials to trap electrons. Examples of the latter approach were reported in IEDM papers from Macronix (Hsinchu, Taiwan), using nitride materials, and by the IMEC microelectronics consortium (Leuven, Belgium), using silicon-rich oxides. But much of the work to replace the current cell has focused on entirely new means of storing data. Some of this research is going into ferroelectric cells, which store data in a bistable PZT film. Some, particularly at Sharp Laboratories America (Camas, Wash.), is directed to an entirely different mechanism, magnetoresistive films. Those films exhibit a stable but reversible and quite dramatic change in resistance in response to electrical pulses. Similarly, STMicroelectronics (Agrate Brianza, Italy) last week reported work with amorphous chalcogenide films: a somewhat ironic reappearance of the much-ridiculed Ovshin-ksi devices of the 1960s.
In one sense, nearly all flash memory cells are quantum devices, in that they depend on tunneling for programming, erase or both. Without quantum mechanics, there would be no way for the electrons to get across the thin tunnel oxide layers to and from the floating gates. But today's devices work at by quantum electronics standards a massive scale, integrating the effect of thousands or millions of tunneling electrons to produce huge changes in net charge on monstrous floating gates.
Two teams, same effect
In theory, it would be possible to make devices small enough so that trapping even a few electrons would shift the energy structure of a channel and thereby change the threshold voltage of the transistor, resulting in a readable memory device. That would mean very short program and erase times, because only a few electrons would be moving. And it would mean electrical compatibility with existing circuits, because threshold-voltage changes would be large enough to sense easily. The Tokyo and AMD papers described two quite different structures in which exactly that effect has been observed.
In the Tokyo paper, a scattering of silicon nanocrystals is grown on top of a tunneling oxide, and then sealed in place with a much thicker control oxide. The entire assembly lies between the gate electrode and the channel of a conventional FET. The nanocrystals, which measure around 8 nm across, are grown by low-pressure chemical vapor deposition directly on top of the tunneling oxide. They are so small that they form quantum wells capable of trapping single electrons.
The Tokyo researchers' moment of epiphany came when they realized that by narrowing the width of the channel region beneath the nanocrystals, they increased the effect of the crystals on threshold voltage. When the channel was reduced to a width of 5 to 10 nm, effects from small numbers of nanocrystals resulted in very usable changes in threshold voltage.
A remarkably similar result was achieved at AMD, but with a quite different structure. The work started with what the researchers called a polysilicon nanowire a thread of poly with a teardrop cross-section, running around the edge of a conventional MOSFET gate. Like the Tokyo team's nanocrystals, AMD's nanowire was embedded between a very thin lower oxide and a somewhat thicker upper oxide.
And like the Tokyo team, the AMD group discovered that what was a reasonably promising flash memory cell with a relatively large nanowire became a very good cell indeed when the nanowire's thickness approached 2 nm. Such tiny features can be fabricated without stressing lithographic limits because the wire results from the interaction of several etching, deposition and diffusion steps and is not actually drawn on the wafer.
The AMD device with the smallest wires exhibited what appears to be quantum behavior, showing very fast programming time and unlike the nanocrystal device very good data retention. Also, the presence of a small number of electrons, estimated by AMD at about 1,000, causes a very substantial shift in threshold voltage.
It appears from these papers that the most promising next flash technology may in fact be quantum-well technology. The absence of strange materials is good news for harried process engineers, while the fact that the cells are, in all external respects, ordinary MOSFETs promises few problems for circuit designers.