In my 25 years in high technology, I've been witness to many boom-to-bust cycles. What all of them have had in common is a surge in customer demand for new technologies, which is precisely what we are seeing today as mobile computing supplants traditional desktop computing.
How many examples do we require to be certain that this is where the meat of the market really is today and for the next several years? Smart-phone shipments surged 400 percent in the first quarter; the Blackberry, putting e-mail in your pocket, is a phenomenon, with 80 percent of those on Wall Street now toting them everywhere; 802.11 wireless hotspots are a fact of life in all major metropolitan areas. And isn't it remarkable that those now trying to live without a cell phone are a distinct minority in all socioeconomic and age categories?
Consumer electronics is heading down the same path. The switch to digital photography is in full swing, with Dataquest predicting an $8 billion market worldwide in 2003, and it is easy to assume that wireless home networking and gaming will grow accordingly.
So what is there to fear? The market is whispering to us now but will soon be roaring. Many populations worldwide are underserved, and demand for new products and features guarantee growth for years to come. The challenge is to adapt to the new reality of portable computing, imaging and communications while the curve is ascending.
That is not to say we face an easy task, particularly in the design of low-power systemson-chip to satisfy burgeoning demand. First-silicon failure rates caused by power and signal-integrity problems are rising at an alarming rate: Fully 40 percent of chips have SI defects at 90 nanometers, and leakage that continuously drains power in portables can slash battery life in half.
But, as we have learned, every problem presents a new opportunity. Process science continues to advance to deal with the physics of wiring together 100 million transistors at 65-nm geometries, and the EDA industry is well aware of the difficulties posed by low-power design. It's no wonder that the hot topic at this year's Design Automation Conference was power-aware design.
In EDA it is no longer good enough to provide tools that draw gates, knit them together and let manufacturing deal with the consequences. The most innovative designers and their EDA collaborators now recognize that power and SI go hand in hand and must be dealt with early in the process.
That is why a new class of top-down, forward-looking tools recognizes these effects at the RTL stage and optimizes for low power before designs are fully realized.