Within two years, both integrated-device manufacturers and standalone foundries will have full production running on 90-nanometer parts, with early 65-nm designs just beginning.
For design teams, there are new challenges at the 90-nm process node. The physics of nanometer silicon means that such effects as power leakage, crosstalk, IR drop and reliability need to be analyzed and accounted for. The inherent variability of manufactured nanometer parts also has a greater impact on the overall performance of designs. And the cost has risen to more than $20 million to design and produce chips of 50 million gates or more. To win market share as the economy recovers, the industry must continue to create successful nanometer chips despite those potential problems.
Unlike previous downturns, the length of this cycle has been so dramatic that even semiconductor R&D budgets have been trimmed. In previous slowdowns, companies designed themselves out of the crisis. It has been clearly shown in a recent independent study commissioned by the Electronic Design Automation Consortium that the most successful semiconductor companies are those that had strong R&D investment, especially in EDA software. We believe that the semiconductor industry is in an extended cycle, made more dramatic by the overcorrection after the dot-com bubble. EDA can bring our semiconductor customers back to profitability and even help them thrive.
Because Moore's Law is predicted to continue for at least the next six years, the number of transistors in ICs will continue to double every 18 months. New methods of design will be needed across the board, and consequently EDA software will need greater capacity and performance. Ideally, the ability to analyze nanometer effects in complex designs will be built into all design tools.
Many designers today do not analyze nanometer effects but instead add guardbands. In effect, they overdesign their circuits to avoid problems due to parasitics in the power bus, signal interconnects and transistor devices. Guardbanding merely covers up those effects, and with the newest generations of nanometer design, guardbanding will prove to be ineffective and unreliable. We need to eliminate the need for guardbanding and replace it with solutions providing insight into nanometer effects and the ability to use this insight to control the performance of the design.
This insight and control will support our customers in creating optimized, differentiated chips that will spur innovative end products with higher performance and lower cost. Delivering effective nanometer solutions will enable new products and markets and accelerate the recovery.