AUSTIN, Texas Faced with intolerable levels of wasted power in its microprocessors, Intel Corp. said it will make the switch to a high-k gate insulator in 2007, reducing current leakage at the gate by at least 100 times.
At the 45-nm process node, Intel will make a double switch, replacing the tried-and-true silicon dioxide with an unidentified high-k insulator. At the same time, it will move from doped polysilicon for the gate electrode to two different metals, one for the NMOS and another for the PMOS transistors.
Nathan Brookwood, principal analyst at Insight64 (Saratoga, Calif.), said "this is a huge deal. The leakage problem has been threatening to slow down Moore's Law, and until now no one has been able to find a high-k dielectric that would not slow transistor switching speeds."
As silicon dioxide is thinned to about five atomic layers in order to turn on the transistor more quickly, electrons have tunneled through the oxide layer, causing wasted power during the "on" state. While the switch to a high-k material will reduce power leakage while the transistors are switching, it does little to improve power dissipation while the transistors are in the "off" state.
Yale University professor T.P. Ma, an authority on the gate oxide issue, said "it is encouraging that Intel has picked the materials it plans to use. This is a big shift. Of course, the industry still has to wonder what those materials are. But this announcement means the race is on" among the major semiconductor suppliers to switch to a high-k oxide.
Sunlin Chou, senior vice president and general manager of the technology and manufacturing group at Intel, said "we believe this is the first convincing demonstration that the industry can use these new materials. This gives us greater confidence that we can keep scaling transistors."
The search for a replacement for silicon dioxide has faced "serious roadblocks," Chou said. The high-k oxides, such as hafnium oxide, zirconium oxide, and others, have resulted in mobility degradation for carriers in the channel below the gate oxide. Moreover, there have been serious problems setting the threshold voltage, particularly for the PMOS transistors.
Intel and others have found that polysilicon is largely incompatible with the various high-k materials. That has forced a dual switch, replacing polysilicon at the gate electrode as silicon dioxide is phased out in favor of a high-k material. In order to tune the work function of the NMOS and PMOS electrodes, Intel will use two different metals, which Chou and others declined to identify.
Intel fellow Robert Chau, who led the gate oxide investigation at Intel's process development laboratory in Hillsboro, Ore., is scheduled to present an invited paper at the International Gate Insulator Workshop in Tokyo on Thursday that stops short of identifying which high-k gate oxide or gate electrode metals Intel will use. Intel said only that the high-k material has 60 percent greater capacitance than silicon dioxide.
The paper describes NMOS and PMOS transistors with physical gate lengths of 80-nm and an electrical oxide thickness of 1.4-nm (14 Angstroms), as measured at inversion. The threshold voltages of the devices were within Intel's targets, and drive currents and off currents were among the best reported to date, according to Intel.
Ken David, director of components research at the manufacturing group, said it is possible that Intel could switch gears at the 45-nm node, using a tri-gate transistor with silicon dioxide, or possibly with a high-k material, as the gate insulator. But if Intel sticks with the conventional planar transistors, it is committed to using the high-k gate insulator and metal gates that it has identified, he said.
Rather than grow the insulation layer as is commonly done with silicon oxide, Intel will use atomic layer deposition (ALD) equipment to deposit the high-k materials, he said.
additional reporting by Rick Merritt