Portland, Ore. - Researchers at NVE Corp. say they have achieved the highest spin-dependent junction tunneling magnetoresistance (TMR) to date-a 70.4 percent change between two stable states at room temperature-in a magnetoresistive "sandwich" structure. The key, the researchers said, was using CoFeB for both the free and pinned magnetic layers in the structure's magnetic tunnel junction.
Since 1995, spin-dependent tunneling in magnetoresistive materials has offered the hope of nonvolatile magnetic RAM as well as more sensitive read heads and magnetic sensors. Advances in materials and techniques have brought steady progress in raising TMR from the 10 percent cited in 1995 to 45 percent in 1999 and 59.5 percent in 2002. Now NVE says it has raised the bar.
"By adding boron to [the iron and cobalt usually used in the pinned magnetic layer], we have achieved over 70 percent tunneling magnetoresistance, and TMR is the best measure available for correlating experimental results with theoretical predictions," said James Daughton, chief technical officer at NVE (Eden Prairie, Minn.). NVE researchers Dexin Wang, Cathy Nordman, Zhenghong Qian and Jonathon Fink worked with Daughton to achieve the TMR results.
NVE focuses on applying its advances to magnetic RAMs-devices that theoretically perform as well as DRAMs but, as nonvolatile memories, require no refresh function and no standby power. In MRAMs, a bit is stored in a magnetic tunnel junction (MTJ), which includes a pinned magnetic layer, a tunnel barrier and a free magnetic layer. The free layer is switched from one magnetic polarization to the other to represent ones and zeros. MRAMs can also be assembled to resemble a serial flash memory by using a series of MTJs controlled by the word and bit lines.
Programming an MRAM takes about the same amount of time as programming a DRAM (about 1,000 times faster than programming a flash memory). When fabricated in today's 180-nanometer processes, the MRAM cell size is about 1 square micron-about the same as DRAM and flash memories, but about one-third the size at of an SRAM cell. Future, 90-nm processes could shrink the nonvolatile MRAM cell to about one-third of a square micron.
In 2002, researchers increased TMR from 45 percent to 59 percent by replacing the NiFeCo free layer in the MTJ with CoFeB. NVE achieved the 70 percent-plus TMR by replacing not only the free layer but also the pinned layer (previously FeCo) with CoFeB. The record TMR value is said to indicate a high-quality tunnel barrier at both interfaces. NVE also reports high symmetry in the bias dependence-a necessary condition for a fully optimized barrier.
The National Science Foundation, the Army and the Missile Defense Agency supported the research. NVE has licensed its MRAM technology to Honeywell and Motorola for use in embedded microcontrollers. Motorola described its process at the International Electron Devices Meeting (see www.eetimes.com/story/OEG20031027S0023).