SAN JOSE Cadence Design Systems Inc. and foundry United Microelectronics Corp. have announced an RTL-to GDSII reference flow for digital IC designs implemented in UMC's 130-nm and lower processes.
The reference flow incorporates Cadence technologies, including Encounter(TM) RTL Compiler, First Encounter GPS (Global Physical Synthesis), NanoRoute, Fire & Ice QX, CeltIC-NDC, VoltageStorm power analysis and Assura physical verification Tools, the companies said.
The flow uses a "wires first" methodology to address key nanometer design issues such as timing closure, signal integrity and power integrity.
The Cadence-UMC flow also uses Faraday Corp.'s library and memories.
The UMC and Cadence digital reference flow kit is currently available at no charge to UMC customers, from UMC sales representatives or accessible online through UMC's Web site.