SAN JOSE, Calif. AccelChip Inc. said it has teamed with SystemC tool vendor CoWare Inc. and, seperately, with Mentor Graphics to provide advanced design and verification flows for DSP design.
As part of the CoWare AccelChip collaboration, the partners have integrated CoWare's DSP application design tool, SPW, with AccelChip's algorithmic synthesis tools to offer DSP design teams the ability to verify generated Verilog or VHDL within the SPW environment.
According to the companies, the integration allows mutual users to verify their designs at the MATLAB, RTL and gate levels within the context of the entire system using SPW.
In addition to integration with CoWare, AccelChip also announced it has joined Mentor's OpenDoor interoperability program to enhance interoperability between the two companies' products.
The companies said they want to ensure that after the AccelChip DSP Synthesis tool and associated AccelWare intellectual property synthesize MATLAB algorithms into VHDL or Verilog and testbenches, the code can then by simulated with Mentor's ModelSim simulator and Mentor's Precision RTL and Leonardo Spectrum synthesis tools.
CoWare's SPW 4.85 including AccelChip application support is available to SPW customers now. Future releases of SPW 5-XP for Windows will provide similar integration.