WASHINGTON The National Science Foundation will fund design verification courses at Virginia Tech's engineering department designed to overcome future roadblocks in complex designs.
NSF awarded the university $371,000 to develop new courses meant to bridge the verification gap.
"We must train students to see that verification is a critical step in the design process," said Michael Hsiao, associate professor of electrical and computer engineering in the College of Engineering at Virginia Tech (Blacksburg, Va.). "Otherwise too much valuable time is wasted debugging problems in the design."
Hsiao's research group recently announced advances in design verification. Mathematically, the researchers claimed to have reduce the number of steps in the verification process exponentially.
"In many cases, the number of distinct states a design can hold is greater than the number of protons in the universe," Hsiao said.
The researchers noted that the most recent International Roadmap for Semiconductors warned that the lack of major breakthroughs in design verification is a potential "show-stopping barrier" to the semiconductor industry.