MANHASSET, N.Y. Pure-play independent specialty foundry Tower Semiconductor Ltd. announced Wednesday (April 13) the introduction of its in-house set of 0.18 and 0.13-micron design libraries.
Tower Semiconductor's (Migdal Haemek, Israel) standard cells, I/Os and memory compilers, for use in complex system-on-chip (SoC) designs, are based on Synopsys' library technology, and are available to Tower customers at no charge.
Tower's 0.13-micron libraries will augment the existing 0.18-micron libraries, which were proven on silicon and have been used in multiple high-volume customer designs. Tower libraries include a comprehensive set of views for leading EDA tools.
"In line with our specialized foundry strategy, Tower customers can now enjoy flexible, in-house customization to meet specific customer and technology segment needs," said Rafi Nave, vice president of customer services, Tower Semiconductor, in a statement. "Our customers can now benefit from high-quality, low-risk solutions, resulting in faster time-to-market and faster time-to-production in the most affordable way."
The standard cells have been optimized for high place-and-route density. A wide range of input/outputs with over-voltage input tolerance, noise-quieting circuitry and ESD protection are available in both in-line and staggered configuration. Memory compilers for ROM, high-density SRAM and dual-port RAM provide high performance, high density and configuration flexibility.