LONDON Virage Logic Corp., has agreed to develop libraries in support of 65-nanometer manufacturing processes from leading foundry Taiwan Semiconductor Manufacturing Co. Ltd.
The agreement covers memory compilers, Virage (Fremont, Calif.) said.
"At the 65-nm node, on-chip memory may occupy more space than logic or any other IP and therefore it's important for our customers to get early access to advanced memory compilers," said Edward Wan, senior director of design service marketing for TSMC, in a statement issued by Virage.
Virage Logic said it would offer multiple memory architectures for TSMC's 65-nm processes to meet specific needs.
The first views of the 65-nm intellectual property would be made available to design engineers in the third quarter of the year, Virage said. First Virage Logic commercial products would be made available in the fourth quarter on TSMC's 65nm low-power and generic processes. Virage Logic said it would also develop compilers for the
TSMC 65-nm high-speed process that is due to become available in 2006.