Asynchronous, or clockless, logic--an alternative to standard digital circuits that avoids many of their problems--is beginning to look attractive for embedded designs in consumer electronics and mobile devices.
Several factors make this alternative more viable. For one, companies have emerged that are developing asynchronous designs for fabless IC companies, using their logic expertise to address segments of the market that synchronous logic has been hard-pressed to satisfy. Also, the complex collection of design methodologies under the asynchronous umbrella is settling out to three or four approaches optimized for specific segments. A third trend is the increasing use, even among the largest semiconductor companies, of asynchronous techniques to achieve the performance, power and cost objectives the market demands.
The acceptance of what was once a pure research field is being propelled by efforts at universities and within the asynchronous companies to develop EDA tools and design flows that can be integrated into the custom and semi-custom methods now used by the industry for synchronous design.
Traditionally, most mainstream circuit designs are built with synchronous logic--small blocks of combinatorial logic separated by synchronously clocked registers. The biggest advantage of this approach is that synchronous logic makes it easy to determine the maximum operating frequency of a design by finding and calculating the longest delay path between registers in a circuit.