The semiconductor intellectual property (IP) industry is about 15 years old, but it seems that we are still far away from the dream of effective IP reuse on the scale that we need. In the early days, companies could have a legitimate IP make versus buy discussion for their next chip.
Today, such a discussion is out of the question as current chip designs are so large and complex that we have crossed over the threshold where every design contains purchased IP. For far too many, though, it is still not a happy story.
How can it be that with such a clear demand, IP sellers and buyers still struggle to find a winning business model and value proposition? Perhaps it’s that we don’t have a clear agreement on what’s important.
In 1943, Abraham Maslow published a paper on his theory that all human beings have a basic set of needs that form a hierarchy. The most basic needs have the highest priority, like having enough food and water to survive the day. Once a lower order of the hierarchy is satisfied, higher level needs such as security, being part of a social community, and ego-related needs like self-esteem become increasingly important.
The final level of the hierarchy is called “self actualization”, where one becomes capable of achieving their full potential. Whether Maslow’s theory is correct is beside the point, but the idea of a hierarchy model to relate the relative priority of a vast set of IP deliverables for the SoC designer may be very useful.
Figure 1 Human beings have an inherent hierarchy of needs that must be satisfied in order. The needs of an SoC design engineer integrating 3rd-party IP may also be represented by such a hierarchy.
In Figure 1, Maslow’s Hierarchy of Needs is shown alongside a hierarchy model of the SoC designer’s needs. Let’s explore them in order.
Functional correctness, the pyramid’s foundation
Customers expect products that work, and SoC designers are no exception. This is the most basic need of every chip designer, as first-pass-functional silicon depends on reliable IP. The best and most unambiguous measure of functional correctness is the extent to which IP has been validated in production silicon. SoC designers don’t like being the lab rats of IP providers and often find themselves discovering bugs that they feel should have been long ago sorted out by the provider.
Often IP providers confuse a plethora of deliverables and design methodologies with functional correctness. There is no measurable correlation between the two. As with most things, the biggest predictor of future success is past success. In other words, SoC designers want to use IP that has been silicon proven and the more times the better.
So what about new standards, where there is not yet any silicon-proven IP? In these cases, large companies that can afford to adequately invest in the development of the IP have the best chance of developing functionally correct IP. For the most part, these are semiconductor companies who have the silicon revenue behind them to justify the multi-million dollar development investment.