SAN FRANCISCO, Calif. If you think EDA is all about IC and pc-board design, your thinking is too limited, according to Gartner Dataquest analysts speaking at the eve of this week's Design Automation Conference (DAC) here. The biggest problem with system-on-chip (SoC) design is embedded software development, the analysts said.
Both Gary Smith, managing vice president for design and engineering, and Daya Nadamuni, research vice president at Gartner Dataquest, stressed the importance of software at the annual Gartner Dataquest pre-DAC reception and briefing. Smith focused on the difficulty and cost of software development, while Nadamuni emphasized programming challenges for multicore SoCs.
Smith observed that the EDA industry has been holding the cost of IC design relatively constant for many years, in the $10 to $20 million range, despite steep rises in complexity. "This industry has done an outstanding job of holding down the cost of design," he said. "But the cost of design is up because of the cost of embedded software." Smith's simple message: "It's the software, stupid."
Smith noted that software design teams are getting "gigantic" and software productivity isn't improving. Programmability has replaced power as the number one impediment to the continuation of Moore's Law, he said. "The cost of software is killing us right now, and we've got to do something about it," he said.
RTL tools are becoming commodities, and will be lucky to see 5 percent annual growth, he said. IC CAD growth is being driven by design for manufacturing (DFM) compatible tools, but this growth could slow if semiconductor makers turn to restricted design rules (RDRs) at 32 nm. So where's the opportunity for growth, Smith asked?
Smith noted that the use of in-house tools is increasing dramatically. Last year, 27 percent of engineers said they were using in-house tools; this year, the total has gone up to 38 percent. Many of these internally developed tools are system design tools, he said.
Electronic system level (ESL) design, Smith said, "really started taking off last year. We're seeing good growth." But the total available market has barely been tapped, he said. Smith noted that there are around 1 million designers today, of which 18 percent are ASIC designers, 32 percent are system engineers, and 50 percent are embedded engineers. But only 4 percent of this total are doing system-level design, he said.
Will people pay for new tools? Smith said that system engineers aren't afraid to pay up to $120,000 per seat, and embedded software engineers, who today are used to $15,000 per seat, would pay $45,000 per seat for tools that will solve the concurrent design problem.