There are several reliability problems that can cause even a functionally correct chip to fail over time. These become more problematic at 45 nanometers and below. Authors from the University of Michigan and the University of Texas note the following "time-dependent wearout" modes in their HPCA 2006 paper on the Bulletproof chip multiprocessor switch architecture:
• Electromigration, which results from the mass transport of metal atoms in chip interconnects.
• Hot-carrier degradation, in which carriers are heated by strong electrical fields and subsequently injected into gate oxide.
• Time-dependent oxide breakdown, due to the extensive use of ultrathin oxide for high performance.
In addition, there's increasing concern about single-event upsets, which are soft errors caused by charged particles such as neutrons and alpha particles that strike the bulk silicon portion of a die. SEUs can potentially cause logic glitches.