San Francisco -- With the end of Moore's Law looming as a possibility, the search for something to replace today's workhorse CMOS-based silicon is intensifying, researchers told last week's AVS International Symposium & Exhibition here. But thus far, no consensus or cost-effective device technology has emerged for the dreaded post-CMOS era, less than a decade away, the researchers warned.
That era--when the bulk silicon in today's chip-making fabs no longer scales--could hit by 2015 or sooner, they hinted. By that time, fabs would need a replacement technology, such as carbon nanotubes, nanowires, molecular electronics, quantum computing, three-dimensional transistor designs and spintronics. And the semiconductor industry could see other sweeping and costly changes, including the frightening prospect of 675-millimeter-wafer fabs appearing around 2021.
But the 675-mm fab is not seen as the most critical element of the post-CMOS era. More pressing for the industry is narrowing the choices and finding the most feasible next-generation device technology, said C. Michael Garner, manager of the External Materials Research Group at Intel Corp. (Santa Clara, Calif.).
"Moore's Law will continue," Garner said, "but the industry needs to define a device technology [to replace CMOS-based bulk silicon] before 2010 or 2011."
That's easier said than done. Chip makers, universities and government-backed consortia have already spent millions to research next-generation devices, all of which pose trade-offs and involve manufacturing complexities.
There is still no consensus on where the bulk of the funding should be spent. "It's wide open now," said Paul Nealey, Smith-Bascom professor of chemical and biological engineering for the Nanoscale Science and Engineering Center at the University of Wisconsin (Madison). The university is one of several entities looking into pattern-assisted self-assembly, which could be the eventual replacement for optical--and perhaps extreme-ultraviolet--lithography in the next decade.
Nanotubes to the rescue?
Leading-edge chip makers are investigating a breathtaking range of novel and exotic technologies for 2013 and beyond. Intel, for example, is researching trigate transistors, carbon nanotubes, silicon nanowires, III-V-based chips, spintronics, phase change logic devices, interference devices and optical switches.
Among the new technologies, carbon nanotubes--graphene sheets, rolled into cylinders, that determine the electronic properties of the device--are generating the most buzz.
Nantero Inc. (Woburn, Mass.), a startup developing a novel nonvolatile memory, said it has become the first company to make carbon nanotubes in production fabs. Its NRAM, a nonvolatile random access memory, is based on a carbon nanotube matrix structure laid across an etched trench. The company announced it had fabricated and tested a 22-nm memory switch in the spring.
At AVS, Intel hinted that carbon nanotubes hold the most promise for logic applications in the post-CMOS era. The chip giant said it has manufactured a 20- to 50-GHz carbon nanotube device at line width geometries from 2 to 5 nm.
But Intel doesn't expect carbon nanotubes to be used for logic for another decade. The problem is controlling the material properties of the device, said Mike Mayberry, director of components research and vice president of Intel's technology manufacturing group. "It can be done on a lab scale," Mayberry said, "but we don't know how to put millions of them on a wafer. It really looks like a daunting challenge."
Others said the industry should move in another direction. "Spin looks to be the most promising," said Jeffrey Welser, director of the Nanoelectronics Research Initiative, which seeks to demonstrate novel devices with critical dimensions below 10 nm. By "spin," Welser meant an experimental technology called spintronics, or spin electronics, which refers to the role of electron spin in data storage.
Still to be seen is how to manufacture these next-generation devices. If or when optical lithography runs out of gas, Wisconsin University has proposed an exotic technology: self-assembly.
In January, the university discovered that materials known as block copolymers will spontaneously assemble into intricate 3-D shapes when deposited onto particular two-dimensional surface patterns created with photolithography. Lab demonstrations show a strategy for building complex, 3-D nanostructures by using standard semiconductor lithography tools.
Another uncertainty is next-generation fabs. The chip industry is in the era of 300-mm fabs. The 450-mm fab era is projected to emerge in 2012 or so, ac-cording to the International Technology Roadmap for Semiconductors.
Some believe 450-mm fabs will never get built, in part because of the astronomical costs and lack of equipment for the technology. Intel, however, is expected to move forward with 450-mm fabs, which could cost $5 billion or more.
What's next? If one extrapolates beyond 450 mm, the next fabs could produce giant, 675-mm wafers, starting in the 2021 time frame, Intel's Garner said.
For now, the 675-mm wafer size is hypothetical, Garner said. "It represents what we would do next, but it's not on the road map."
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