SANTA CLARA, Calif. Nanometer chip design is becoming so compute-intensive that it needs supercomputer-like capability, according to Mentor Graphics Corp. and Mercury Computer Systems Inc. In particular, optical proximity correction (OPC) can best be performed by hardware acceleration based on the Cell Broadband Engine processor, the companies claim.
To that end, Mentor and Mercury announced last week that they will roll out the first Cell BE processor-based acceleration platform for the EDA market. It's a different direction for an EDA industry that thus far, except for simulation accelerators and emulators, has relied on software that runs on general-purpose CPUs and servers.
And it may be the right place to try a new approach. OPC, which foundries and mask shops run on every IC after tapeout, is perhaps the most computationally intensive part of the design-to-manufacturing process.
Rather than build specialized hardware strictly for OPC, however, the two companies worked together so that Mentor's new Calibre nmOPC offering, also introduced last week, can leverage Mercury's Dual Cell-Based Blade.
Mark Skalabrin, vice president and general manager of Mercury's advanced solutions business unit, said teams from Mentor and Mercury had looked at a number of possible ways to speed OPC computations, including FPGAs, DSPs and general-purpose processors. The Cell emerged as the best choice, Skalabrin said. "There's a very significant gain. Some algorithms are 50 to 100 times faster."
General-purpose computing clusters, said Skalabrin, are "just becoming unmanageable" and are consuming too much power. "There is a real need for specialized computing," he said.
"Absent innovation, we are facing a crisis in turnaround time with OPC," said Joe Sawicki, vice president and general manager of Mentor's design-to-silicon division. Even at 65 nanometers, according to Sawicki, some customers are using 1,000 processor nodes to run OPC--and taking days to do it. Some are talking about needing 2,000 nodes for 45 nm, "an unacceptable explosion in the cost of ownership," Sawicki said.
Large clusters of Linux workstations are used internally at big EDA vendors, and Synopsys Inc. has gone so far as to attain official "supercomputer" status through the Top500 organization (see related story, page 8).
But Sawicki said that adding a coprocessor acceleration (CPA) cluster of Cell processors is a far better solution--one that can dramatically lower the number of general-purpose CPUs required for OPC tasks.
According to Sawicki, a CPA cluster of 25 to 50 Cell processors complementing 100 to 200 general-purpose CPUs can achieve the same computing capacity as 750 to 1,000 CPUs without a CPA. Cost, space and power consumption will be dramatically reduced, he said.
And in a large data center, just generating power can be 50 percent of the cost, Sawicki noted.